From: William Wu Date: Tue, 18 Apr 2017 08:14:58 +0000 (+0800) Subject: arm64: dts: rockchip: add linestate check dis quirk for rk3399 dwc3 X-Git-Tag: release-20171130_firefly~4^2~790 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9be0be74f5feff89b789bc5158eb72222f2bebdc;p=firefly-linux-kernel-4.4.55.git arm64: dts: rockchip: add linestate check dis quirk for rk3399 dwc3 rk3399 dwc3 has a problem that USB 2.0 MAC lineState not reflect the expected line state (J) during transmission. Add this quirk to add the ipgap between (tkn to tkn/data) with 40 bit times of TXENDDELAY, and linestate is ignored during this 40 bit times delay. Change-Id: Ife9d46dbf2a8d4a8faa2fc20bfad442d6bb88a05 Signed-off-by: William Wu --- diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 3cbbacc2bb27..6f5501622c69 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -402,6 +402,7 @@ snps,dis-u2-freeclk-exists-quirk; snps,dis_u2_susphy_quirk; snps,dis-del-phy-power-chg-quirk; + snps,tx-ipgap-linecheck-dis-quirk; snps,xhci-slow-suspend-quirk; status = "disabled"; }; @@ -432,6 +433,7 @@ snps,dis-u2-freeclk-exists-quirk; snps,dis_u2_susphy_quirk; snps,dis-del-phy-power-chg-quirk; + snps,tx-ipgap-linecheck-dis-quirk; snps,xhci-slow-suspend-quirk; status = "disabled"; };