From: Ambresh K Date: Sat, 16 Mar 2013 06:16:42 +0000 (+0530) Subject: memory: emif: setup LP settings on freq update X-Git-Tag: firefly_0821_release~3680^2~676^2~74 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9ea03dec380208bfee015b25f253c2f58aba0071;p=firefly-linux-kernel-4.4.55.git memory: emif: setup LP settings on freq update Program the power management shadow register on freq update Else the concept of threshold frequencies dont really matter as the system always uses the performance mode timing for LP which is programmed in at init time. Signed-off-by: Nishanth Menon Signed-off-by: Ambresh K Signed-off-by: Lokesh Vutla Acked-by: Santosh Shilimkar Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/memory/emif.c b/drivers/memory/emif.c index 897c39a8db86..bda11ebb25cd 100644 --- a/drivers/memory/emif.c +++ b/drivers/memory/emif.c @@ -819,6 +819,8 @@ static void setup_registers(struct emif_data *emif, struct emif_regs *regs) writel(regs->sdram_tim2_shdw, base + EMIF_SDRAM_TIMING_2_SHDW); writel(regs->phy_ctrl_1_shdw, base + EMIF_DDR_PHY_CTRL_1_SHDW); + writel(regs->pwr_mgmt_ctrl_shdw, + base + EMIF_POWER_MANAGEMENT_CTRL_SHDW); /* Settings specific for EMIF4D5 */ if (emif->plat_data->ip_rev != EMIF_4D5)