From: Will Deacon Date: Wed, 9 Oct 2013 14:54:27 +0000 (+0100) Subject: arm64: lockref: add support for lockless lockrefs using cmpxchg X-Git-Tag: firefly_0821_release~3680^2~35^2~1^2~78 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=9f89c68bf6d720eae561dc5a796f727a57e8daea;p=firefly-linux-kernel-4.4.55.git arm64: lockref: add support for lockless lockrefs using cmpxchg Our spinlocks are only 32-bit (2x16-bit tickets) and our cmpxchg can deal with 8-bytes (as one would hope!). This patch wires up the cmpxchg-based lockless lockref implementation for arm64. Signed-off-by: Will Deacon Signed-off-by: Catalin Marinas (cherry picked from commit 5686b06cea34e31ec0a549d9b5ac00776e8e8d6d) Signed-off-by: Mark Brown --- diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 52077610cb7e..9115252e5425 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -1,6 +1,7 @@ config ARM64 def_bool y select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE + select ARCH_USE_CMPXCHG_LOCKREF select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select ARCH_WANT_FRAME_POINTERS diff --git a/arch/arm64/include/asm/spinlock.h b/arch/arm64/include/asm/spinlock.h index 525dd535443e..3d5cf064d7a1 100644 --- a/arch/arm64/include/asm/spinlock.h +++ b/arch/arm64/include/asm/spinlock.h @@ -92,10 +92,14 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) : "memory"); } +static inline int arch_spin_value_unlocked(arch_spinlock_t lock) +{ + return lock.owner == lock.next; +} + static inline int arch_spin_is_locked(arch_spinlock_t *lock) { - arch_spinlock_t lockval = ACCESS_ONCE(*lock); - return lockval.owner != lockval.next; + return !arch_spin_value_unlocked(ACCESS_ONCE(*lock)); } static inline int arch_spin_is_contended(arch_spinlock_t *lock)