From: zhaoyifeng <zyf@rock-chips.com>
Date: Sat, 31 Mar 2012 10:28:45 +0000 (+0800)
Subject: Nand Driver:Add clk config.
X-Git-Tag: firefly_0821_release~9526
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a0c88888e4ab55d365efbfdeb7dec8e70dcd83bd;p=firefly-linux-kernel-4.4.55.git

Nand Driver:Add clk config.
---

diff --git a/drivers/mtd/rknand/rknand_base_ko.c b/drivers/mtd/rknand/rknand_base_ko.c
index 0afad0d4fc8a..bdd0dec451c7 100755
--- a/drivers/mtd/rknand/rknand_base_ko.c
+++ b/drivers/mtd/rknand/rknand_base_ko.c
@@ -22,6 +22,8 @@
 #include <asm/mach/flash.h>
 //#include "api_flash.h"
 #include "rknand_base.h"
+#include <linux/clk.h>
+#include <linux/cpufreq.h>
 
 #define DRIVER_NAME	"rk29xxnand"
 
@@ -305,6 +307,56 @@ static int rknand_block_markbad(struct mtd_info *mtd, loff_t ofs)
 	return 0;
 }
 
+
+static struct clk			*nandc_clk;
+static unsigned long		 nandc_clk_rate = 0;
+static struct notifier_block   nandc_freq_transition;
+/* cpufreq driver support */
+static int rknand_nand_timing_cfg(void)
+{
+	unsigned long newclk;
+	newclk = clk_get_rate(nandc_clk);
+	printk("rknand_nand_timing_cfg %d",newclk);
+	if (newclk != nandc_clk_rate) 
+	{
+        if(gpNandInfo->nand_timing_config)
+        {
+            nandc_clk_rate = newclk;
+            //gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz
+        }
+	}
+	return 0;
+}
+
+#ifdef CONFIG_CPU_FREQ
+static int rknand_cpufreq_transition(struct notifier_block *nb, unsigned long val, void *data)
+{
+    if(val == CPUFREQ_POSTCHANGE)
+        rknand_nand_timing_cfg();
+	return 0;
+}
+
+static inline int rknand_cpufreq_register(void)
+{
+	nandc_freq_transition.notifier_call = rknand_cpufreq_transition;
+	return cpufreq_register_notifier(&nandc_freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
+}
+
+static inline void rknand_cpufreq_deregister(void)
+{
+	cpufreq_unregister_notifier(&nandc_freq_transition, CPUFREQ_TRANSITION_NOTIFIER);
+}
+#else
+static inline int rknand_cpufreq_register(void)
+{
+	return 0;
+}
+
+static inline void rknand_cpufreq_deregister(void)
+{
+}
+#endif
+
 static int rknand_info_init(struct rknand_info *nand_info)
 {
 	struct mtd_info	   *mtd = &rknand_mtd;
@@ -408,10 +460,12 @@ int add_rknand_device(struct rknand_info * prknand_Info)
     }
 	if(SysImageWriteEndAdd)
     	gpNandInfo->SysImageWriteEndAdd = SysImageWriteEndAdd;
-    
-    //if(gpNandInfo->nand_timing_config)
-    //    gpNandInfo->nand_timing_config(100*1000);
-        
+
+	nandc_clk = clk_get(NULL, "nandc");
+	clk_enable(nandc_clk);
+    rknand_cpufreq_register();
+    rknand_nand_timing_cfg();
+
     return 0;
 }