From: Evan Cheng Date: Thu, 23 Feb 2006 02:43:52 +0000 (+0000) Subject: PIC related bug fixes. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a0ea0539e359f6d82218e5aa4cdf3b50b17d6fbd;p=oota-llvm.git PIC related bug fixes. 1. Various asm printer bug. 2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26324 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp index ff96e05127c..38418b3593c 100755 --- a/lib/Target/X86/X86ATTAsmPrinter.cpp +++ b/lib/Target/X86/X86ATTAsmPrinter.cpp @@ -134,13 +134,13 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, } else { GVStubs.insert(Name); O << "L" << Name << "$non_lazy_ptr"; - if (TM.getRelocationModel() == Reloc::PIC) - O << "-\"L" << getFunctionNumber() << "$pb\""; } } else { O << Mang->getValueName(GV); - } - } else + } + if (!isCallOp && TM.getRelocationModel() == Reloc::PIC) + O << "-\"L" << getFunctionNumber() << "$pb\""; + } else O << Mang->getValueName(MO.getGlobal()); int Offset = MO.getOffset(); if (Offset > 0) diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp index 5a43f867fd5..c3a873a1856 100644 --- a/lib/Target/X86/X86AsmPrinter.cpp +++ b/lib/Target/X86/X86AsmPrinter.cpp @@ -100,7 +100,7 @@ bool X86SharedAsmPrinter::doFinalization(Module &M) { (forDarwin && I->hasExternalLinkage() && !I->hasSection()))) { if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. if (I->hasExternalLinkage()) { - O << "\t.global\t" << name << "\n"; + O << "\t.globl\t" << name << "\n"; O << "\t.zerofill __DATA__, __common, " << name << ", " << Size << ", " << Align; } else { @@ -119,8 +119,8 @@ bool X86SharedAsmPrinter::doFinalization(Module &M) { if (COMMDirectiveTakesAlignment) O << "," << (AlignmentIsInBytes ? (1 << Align) : Align); } - O << "\t\t" << CommentString << " " << I->getName() << "\n"; } + O << "\t\t" << CommentString << " " << I->getName() << "\n"; } else { switch (I->getLinkage()) { case GlobalValue::LinkOnceLinkage: diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index bea35ec3c8b..1ff4415dac1 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -314,6 +314,13 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, } break; + case X86ISD::TGAWrapper: + if (AM.GV == 0) { + AM.GV = cast(N.getOperand(0))->getGlobal(); + return false; + } + break; + case ISD::Constant: AM.Disp += cast(N)->getValue(); return false; @@ -486,6 +493,16 @@ bool X86DAGToDAGISel::SelectLEAAddr(SDOperand N, SDOperand &Base, // addl $8, %ecx // use // leal 8(%eax), %ecx. + // FIXME: If the other uses ended up being scheduled ahead of the leal + // then it would have been better to use the addl. The proper way to + // handle this is with using X86InstrInfo::convertToThreeAddress hook. + // From an email: + // BTW, this problem is the one that inspired the + // "X86InstrInfo::convertToThreeAddress" hook (which would handle this + // the "right" way). Unfortunately the X86 implementation of this is + // disabled, because we don't currently have enough information handy to + // know that the flags from the add is dead when the hook is called (from + // the register allocator). if (AM.Base.Reg.Val->use_size() > 1) Complexity++; if (Complexity <= 1) @@ -557,6 +574,13 @@ void X86DAGToDAGISel::Select(SDOperand &Result, SDOperand N) { switch (Opcode) { default: break; + case X86ISD::TGAWrapper: { + GlobalValue *GV = cast(N.getOperand(0))->getGlobal(); + SDOperand TGA = CurDAG->getTargetGlobalAddress(GV, MVT::i32); + Result = CodeGenMap[N] = + SDOperand(CurDAG->getTargetNode(X86::MOV32ri, MVT::i32, TGA), 0); + return; + } case ISD::MULHU: case ISD::MULHS: { if (Opcode == ISD::MULHU) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 105e6cebcb6..b7a315a8ad8 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1833,8 +1833,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { SDOperand Result = DAG.getTargetConstantPool(CP->get(), getPointerTy(), CP->getAlignment()); // Only lower ConstantPool on Darwin. - if (getTargetMachine(). - getSubtarget().isTargetDarwin()) { + if (getTargetMachine().getSubtarget().isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (getTargetMachine().getRelocationModel() == Reloc::PIC) Result = DAG.getNode(ISD::ADD, getPointerTy(), @@ -1849,11 +1848,12 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { if (getTargetMachine(). getSubtarget().isTargetDarwin()) { GlobalValue *GV = cast(Op)->getGlobal(); - SDOperand Addr = DAG.getTargetGlobalAddress(GV, getPointerTy()); + Result = DAG.getNode(X86ISD::TGAWrapper, getPointerTy(), + DAG.getTargetGlobalAddress(GV, getPointerTy())); // With PIC, the address is actually $g + Offset. if (getTargetMachine().getRelocationModel() == Reloc::PIC) - Addr = DAG.getNode(ISD::ADD, getPointerTy(), - DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Addr); + Result = DAG.getNode(ISD::ADD, getPointerTy(), + DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Result); // For Darwin, external and weak symbols are indirect, so we want to load // the value at address GV, not the value of GV itself. This means that @@ -1863,7 +1863,7 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || (GV->isExternal() && !GV->hasNotBeenReadFromBytecode()))) Result = DAG.getLoad(MVT::i32, DAG.getEntryNode(), - Addr, DAG.getSrcValue(NULL)); + Result, DAG.getSrcValue(NULL)); } return Result; @@ -1977,6 +1977,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { case X86ISD::REP_MOVS: return "X86ISD::RET_MOVS"; case X86ISD::LOAD_PACK: return "X86ISD::LOAD_PACK"; case X86ISD::GlobalBaseReg: return "X86ISD::GlobalBaseReg"; + case X86ISD::TGAWrapper: return "X86ISD::TGAWrapper"; } } diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index d45afa4a184..de9948cf3fb 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -141,6 +141,10 @@ namespace llvm { /// GlobalBaseReg - On Darwin, this node represents the result of the popl /// at function entry, used for PIC code. GlobalBaseReg, + + /// TGAWrapper - A wrapper node for TargetGlobalAddress, only used on + /// Darwin. + TGAWrapper, }; // X86 specific condition code. These correspond to X86_*_COND in diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 89f53f37632..0782f75566f 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -120,6 +120,8 @@ def X86rdtsc : SDNode<"X86ISD::RDTSC_DAG",SDTX86RdTsc, def X86loadp : SDNode<"X86ISD::LOAD_PACK", SDTLoad, [SDNPHasChain]>; +def X86TGAWrapper : SDNode<"X86ISD::TGAWrapper", SDTIntUnaryOp>; + //===----------------------------------------------------------------------===// // X86 Operand Definitions. // diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp index 1a5aba16608..de503b924e4 100755 --- a/lib/Target/X86/X86IntelAsmPrinter.cpp +++ b/lib/Target/X86/X86IntelAsmPrinter.cpp @@ -128,12 +128,12 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO, } else { GVStubs.insert(Name); O << "L" << Name << "$non_lazy_ptr"; - if (TM.getRelocationModel() == Reloc::PIC) - O << "-\"L" << getFunctionNumber() << "$pb\""; } } else { O << Mang->getValueName(GV); } + if (!isCallOp && TM.getRelocationModel() == Reloc::PIC) + O << "-\"L" << getFunctionNumber() << "$pb\""; } else O << Mang->getValueName(MO.getGlobal()); int Offset = MO.getOffset();