From: Ville Syrjälä Date: Tue, 4 Feb 2014 19:59:20 +0000 (+0200) Subject: drm/i915: Change HSW WIZ hashing mode to 16x4 X-Git-Tag: firefly_0821_release~176^2~3773^2~63^2~328 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a12c4967c96a41cbfc95a8cf8bc7bd697d9df054;p=firefly-linux-kernel-4.4.55.git drm/i915: Change HSW WIZ hashing mode to 16x4 BSpec recommends using 8x4 hashing mode when MSAA is used. But in practice 16x4 seems to have a slight edge in performance (on IVB and HSW at least). So just use 16x4. Signed-off-by: Ville Syrjälä Reviewed-by: Antti Koskipää Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 57101f2321fd..7da7360fea35 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4873,6 +4873,13 @@ static void haswell_init_clock_gating(struct drm_device *dev) I915_WRITE(CACHE_MODE_1, _MASKED_BIT_ENABLE(PIXEL_SUBSPAN_COLLECT_OPT_DISABLE)); + /* + * BSpec recommends 8x4 when MSAA is used, + * however in practice 16x4 seems fastest. + */ + I915_WRITE(GEN7_GT_MODE, + GEN6_WIZ_HASHING_MASK | GEN6_WIZ_HASHING_16x4); + /* WaSwitchSolVfFArbitrationPriority:hsw */ I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);