From: Michel Dänzer Date: Thu, 5 Nov 2015 08:25:27 +0000 (+0900) Subject: drm/radeon: Always disable RADEON_GEM_GTT_UC along with RADEON_GEM_GTT_WC X-Git-Tag: firefly_0821_release~176^2~665^2~4^2~33 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a28bbd5824d4a2af98de45b300ab8d8fb39739fc;p=firefly-linux-kernel-4.4.55.git drm/radeon: Always disable RADEON_GEM_GTT_UC along with RADEON_GEM_GTT_WC Write-combining is a CPU feature. From the GPU POV, these both simply mean no GPU<->CPU cache coherency. Reviewed-by: Christian König Signed-off-by: Michel Dänzer Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index a35f5af77c6a..dda2ecfbf056 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c @@ -231,7 +231,7 @@ int radeon_bo_create(struct radeon_device *rdev, /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit * See https://bugs.freedesktop.org/show_bug.cgi?id=84627 */ - bo->flags &= ~RADEON_GEM_GTT_WC; + bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); #elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT) /* Don't try to enable write-combining when it can't work, or things * may be slow @@ -243,7 +243,7 @@ int radeon_bo_create(struct radeon_device *rdev, DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for " "better performance thanks to write-combining\n"); - bo->flags &= ~RADEON_GEM_GTT_WC; + bo->flags &= ~(RADEON_GEM_GTT_WC | RADEON_GEM_GTT_UC); #endif radeon_ttm_placement_from_domain(bo, domain);