From: Colin Cross <ccross@android.com>
Date: Thu, 9 Sep 2010 02:41:58 +0000 (-0700)
Subject: [ARM] tegra: clock: Don't BUG on changing an enabled PLL
X-Git-Tag: firefly_0821_release~9833^2~142^2~27
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a2b67e2884733316dbb29ba37222df9e395012bb;p=firefly-linux-kernel-4.4.55.git

[ARM] tegra: clock: Don't BUG on changing an enabled PLL

Change-Id: Id213fd4ad8ae1e4429e31625c8b61d6be3fe708f
Signed-off-by: Colin Cross <ccross@android.com>
---

diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index ee249cd1d74b..5b75cb3f5146 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -645,7 +645,6 @@ static int tegra2_pll_clk_set_rate(struct clk *c, unsigned long rate)
 	const struct clk_pll_table *sel;
 
 	pr_debug("%s: %s %lu\n", __func__, c->name, rate);
-	BUG_ON(c->refcnt != 0);
 
 	input_rate = c->parent->rate;
 	for (sel = c->pll_table; sel->input_rate != 0; sel++) {