From: Huibin Hong <huibin.hong@rock-chips.com>
Date: Thu, 19 Mar 2015 09:54:54 +0000 (+0800)
Subject: RK3368: spi: spi0 2csn,spi1 2csn,sp2 1csn in dts config
X-Git-Tag: firefly_0821_release~4158^2~330
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a3dbbc2deb9631c29e16932e5e29f483d1f08804;p=firefly-linux-kernel-4.4.55.git

RK3368: spi: spi0 2csn,spi1 2csn,sp2 1csn in dts config

Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rk3368-tb_8846.dts b/arch/arm64/boot/dts/rk3368-tb_8846.dts
index f683f5548c2a..1c86af18af55 100644
--- a/arch/arm64/boot/dts/rk3368-tb_8846.dts
+++ b/arch/arm64/boot/dts/rk3368-tb_8846.dts
@@ -342,7 +342,16 @@
 	        type = <0>;
 		enable_dma = <0>;
 	};
-
+	spi_test@11 {
+	        compatible = "rockchip,spi_test_bus1_cs1";
+	        reg = <1>;
+	        spi-max-frequency = <24000000>;
+	        //spi-cpha;
+		//spi-cpol;
+	        poll_mode = <0>;
+	        type = <0>;
+		enable_dma = <1>;
+	};
 	*/
 };
 
@@ -360,17 +369,6 @@
 	        type = <0>;
 		enable_dma = <0>;
 	};
-
-	spi_test@21 {
-	        compatible = "rockchip,spi_test_bus2_cs1";
-	        reg = <1>;
-	        spi-max-frequency = <24000000>;
-	        //spi-cpha;
-		//spi-cpol;
-	        poll_mode = <0>;
-	        type = <0>;
-		enable_dma = <0>;
-	};
 	*/
 };
 
diff --git a/arch/arm64/boot/dts/rk3368.dtsi b/arch/arm64/boot/dts/rk3368.dtsi
index 4d90d636dd9c..288de670d65b 100755
--- a/arch/arm64/boot/dts/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rk3368.dtsi
@@ -438,9 +438,9 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
+		pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0 &spi1_cs1>;
 		rockchip,spi-src-clk = <1>;
-		num-cs = <1>;
+		num-cs = <2>;
 		clocks = <&clk_spi1>, <&clk_gates19 5>;
 		clock-names = "spi", "pclk_spi1";
 		//dmas = <&pdma1 13>, <&pdma1 14>;
@@ -1623,6 +1623,9 @@
 			spi1_tx: spi1-tx {
 				rockchip,pins = <1 GPIO_C1 RK_FUNC_2 &pcfg_pull_up>;
 			};
+			spi1_cs1: spi1-cs1 {
+				rockchip,pins = <3 GPIO_D4 RK_FUNC_2 &pcfg_pull_up>;
+			};
 		};
 
 		spi2 {