From: Colin Cross Date: Wed, 24 Nov 2010 22:56:34 +0000 (-0800) Subject: ARM: tegra: clock: Fix cpu pll table entry for 608MHz X-Git-Tag: firefly_0821_release~9833^2~99^2~10 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a4c245e920ade68b9c230b06c9c163f8f89f5bd9;p=firefly-linux-kernel-4.4.55.git ARM: tegra: clock: Fix cpu pll table entry for 608MHz The 608 MHz table entry would incorrectly produce a 760 MHz clock for input clocks of 12 MHz, 13 MHz, or 26 MHz. Change-Id: I6755fdde88f0851770490818dc2e5e1e2d512f20 Signed-off-by: Colin Cross --- diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index dec27b76eee2..de760974f3ad 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -1534,10 +1534,10 @@ static struct clk_pll_freq_table tegra_pll_x_freq_table[] = { { 26000000, 760000000, 760, 26, 1, 12}, /* 608 MHz */ - { 12000000, 608000000, 760, 12, 1, 12}, - { 13000000, 608000000, 760, 13, 1, 12}, + { 12000000, 608000000, 608, 12, 1, 12}, + { 13000000, 608000000, 608, 13, 1, 12}, { 19200000, 608000000, 380, 12, 1, 8}, - { 26000000, 608000000, 760, 26, 1, 12}, + { 26000000, 608000000, 608, 26, 1, 12}, /* 456 MHz */ { 12000000, 456000000, 456, 12, 1, 12},