From: Chris Lattner Date: Tue, 7 Jul 2009 23:28:46 +0000 (+0000) Subject: SelectionDAG::SignBitIsZero doesn't work right for vectors, X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a4f73182450ad6d7197c9229f6396f2e54faefdf;p=oota-llvm.git SelectionDAG::SignBitIsZero doesn't work right for vectors, for now, conservatively return false. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74969 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 5f45c980a58..c46eee8a4ed 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1516,6 +1516,10 @@ SDValue SelectionDAG::FoldSetCC(MVT VT, SDValue N1, /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We /// use this predicate to simplify operations downstream. bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const { + // This predicate is not safe for vector operations. + if (Op.getValueType().isVector()) + return false; + unsigned BitWidth = Op.getValueSizeInBits(); return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth); }