From: NAKAMURA Takumi <geek4civic@gmail.com>
Date: Sat, 12 Jan 2013 15:19:10 +0000 (+0000)
Subject: MipsAsmParser: Try to unbreak tests to add extra check.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=a96a96cefaa3196bde76a7bda8e57c95893f723b;p=oota-llvm.git

MipsAsmParser: Try to unbreak tests to add extra check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172315 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index 41df9d462df..57338df53cb 100644
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -332,14 +332,14 @@ public:
   }
 
   bool isCPURegsAsm() const {
-    return Reg.Kind == Kind_CPURegs;
+    return Kind == k_Register && Reg.Kind == Kind_CPURegs;
   }
   void addCPURegsAsmOperands(MCInst &Inst, unsigned N) const {
     Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));
   }
 
   bool isCPU64RegsAsm() const {
-    return Reg.Kind == Kind_CPU64Regs;
+    return Kind == k_Register && Reg.Kind == Kind_CPU64Regs;
   }
   void addCPU64RegsAsmOperands(MCInst &Inst, unsigned N) const {
     Inst.addOperand(MCOperand::CreateReg(Reg.RegNum));