From: Benjamin Kramer <benny.kra@googlemail.com>
Date: Mon, 10 Jun 2013 20:19:35 +0000 (+0000)
Subject: tblgen: Assert that InstRWs doesn't grows when we don't expect it.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=aca93cf44f0459b6123e9ec640e4cdc7a86e90de;p=oota-llvm.git

tblgen: Assert that InstRWs doesn't grows when we don't expect it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183690 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/utils/TableGen/CodeGenSchedule.cpp b/utils/TableGen/CodeGenSchedule.cpp
index 503dfc27aae..8015e34c64a 100644
--- a/utils/TableGen/CodeGenSchedule.cpp
+++ b/utils/TableGen/CodeGenSchedule.cpp
@@ -891,6 +891,7 @@ void CodeGenSchedModels::inferFromItinClass(Record *ItinClassDef,
 /// Infer classes from per-processor InstReadWrite definitions.
 void CodeGenSchedModels::inferFromInstRWs(unsigned SCIdx) {
   for (unsigned I = 0, E = SchedClasses[SCIdx].InstRWs.size(); I != E; ++I) {
+    assert(SchedClasses[SCIdx].InstRWs.size() == E && "InstrRWs was mutated!");
     Record *Rec = SchedClasses[SCIdx].InstRWs[I];
     const RecVec *InstDefs = Sets.expand(Rec);
     RecIter II = InstDefs->begin(), IE = InstDefs->end();