From: Evan Cheng Date: Wed, 28 Feb 2007 23:12:34 +0000 (+0000) Subject: Doh. ARM::PC is obvious a reserved register. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=ad78ef215485389bb5c5698fa6f1ac670f0076d8;p=oota-llvm.git Doh. ARM::PC is obvious a reserved register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34763 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 2c53bfd6938..3dac8b030b3 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -315,6 +315,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const { BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); + Reserved.set(ARM::PC); if (STI.isTargetDarwin() || hasFP(MF)) Reserved.set(FramePtr); // Some targets reserve R9.