From: Bill Schmidt Date: Thu, 31 Jul 2014 14:38:17 +0000 (+0000) Subject: Add PowerPC release notes for 3.5. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b0574ad2a294dc3c180d533a253961b5a1ee6260;p=oota-llvm.git Add PowerPC release notes for 3.5. Here's my take on 3.5 changes for PowerPC. Others please feel free to add, edit, delete as desired. Thanks, Bill git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214403 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst index 588d1dd6db3..2924df3e69c 100644 --- a/docs/ReleaseNotes.rst +++ b/docs/ReleaseNotes.rst @@ -183,6 +183,36 @@ MIPS64r2, and MIPS64r6 as well as some of the Application Specific Extensions such as MSA. It also supports several of the MIPS specific assembler directives such as ``.set``, ``.module``, ``.cpload``, etc. +Changes to the PowerPC Target +============================= + +The PowerPC 64-bit Little Endian subtarget (powerpc64le-unknown-linux-gnu) is +now fully supported. This includes support for the Altivec instruction set. + +The Power Architecture 64-Bit ELFv2 ABI Specification is now supported, and +is the default ABI for Little Endian. The ELFv1 ABI remains the default ABI +for Big Endian. Although use of ELFv1 on Little Endian or ELFv2 on Big +Endian can be selected via command-line option, this is not recommended or +even advisable. + +Links to the ELFv2 ABI specification and to the Power ISA Version 2.07 +specification may be found `here `_ (free registration required). +Efforts are underway to move this to a location that doesn't require +registration, but the planned site isn't ready yet. + +Experimental support for the VSX instruction set introduced with ISA 2.06 +is now available using the ``-mvsx`` switch. Work remains on this, so it +is not recommended for production use. VSX is disabled for Little Endian +regardless of this switch setting. + +Load/store cost estimates have been improved. + +Constant hoisting has been enabled. + +Global named register support has been enabled. + +Position-independent code can now be generated for the 32-bit ELF subtarget. + External Open Source Projects Using LLVM 3.5 ============================================