From: Chad Rosier Date: Tue, 27 Nov 2012 22:12:11 +0000 (+0000) Subject: [arm fast-isel] Appease the machine verifier by using the proper register X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b1146a242c423a1f703ccdf75f1a7c6649d60f72;p=oota-llvm.git [arm fast-isel] Appease the machine verifier by using the proper register classes. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168733 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 96e2ce9f38d..e972a93687c 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -2595,10 +2595,12 @@ unsigned ARMFastISel::ARMEmitIntExt(EVT SrcVT, unsigned SrcReg, EVT DestVT, break; case MVT::i8: if (!Subtarget->hasV6Ops()) return 0; - if (isZExt) + if (isZExt) { Opc = isThumb2 ? ARM::t2UXTB : ARM::UXTB; - else + } else { Opc = isThumb2 ? ARM::t2SXTB : ARM::SXTB; + RC = isThumb2 ? &ARM::rGPRRegClass : &ARM::GPRnopcRegClass; + } break; case MVT::i1: if (isZExt) {