From: Evan Cheng Date: Fri, 22 Oct 2010 21:29:58 +0000 (+0000) Subject: Transfer implicit ops when forming load multiple and return instructions. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b179b46cc558c720d23a066c768bad71f975eb93;p=oota-llvm.git Transfer implicit ops when forming load multiple and return instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117151 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h index f843196105d..fc84f8c9531 100644 --- a/include/llvm/CodeGen/MachineInstr.h +++ b/include/llvm/CodeGen/MachineInstr.h @@ -416,6 +416,10 @@ public: /// bool allDefsAreDead() const; + /// copyImplicitOps - Copy implicit register operands from specified + /// instruction to this instruction. + void copyImplicitOps(const MachineInstr *MI); + // // Debugging support // diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp index 2f73551aa6d..3b7b4d218d2 100644 --- a/lib/CodeGen/SimpleRegisterCoalescing.cpp +++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp @@ -680,7 +680,7 @@ bool SimpleRegisterCoalescing::ReMaterializeTrivialDef(LiveInterval &SrcInt, RemoveCopyFlag(MO.getReg(), CopyMI); } - TransferImplicitOps(CopyMI, NewMI); + NewMI->copyImplicitOps(CopyMI); li_->ReplaceMachineInstrInMaps(CopyMI, NewMI); CopyMI->eraseFromParent(); ReMatCopies.insert(CopyMI); diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp index a7d1d9f3fbd..6b9e75f95d3 100644 --- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp +++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp @@ -1196,6 +1196,7 @@ bool ARMLoadStoreOpt::MergeReturnIntoLDM(MachineBasicBlock &MBB) { unsigned NewOpc = isThumb2 ? ARM::t2LDM_RET : ARM::LDM_RET; PrevMI->setDesc(TII->get(NewOpc)); MO.setReg(ARM::PC); + PrevMI->copyImplicitOps(&*MBBI); MBB.erase(MBBI); return true; }