From: hxy <hxy@rock-chips.com>
Date: Tue, 14 Aug 2012 02:46:02 +0000 (+0800)
Subject: update rk3066b(rk31) sdk board according hw sch
X-Git-Tag: firefly_0821_release~8912^2~5
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b3a15f334a711433e77a9f7d3fb7f4067611b5d5;p=firefly-linux-kernel-4.4.55.git
update rk3066b(rk31) sdk board according hw sch
---
diff --git a/arch/arm/configs/rk3066b_sdk_defconfig b/arch/arm/configs/rk3066b_sdk_defconfig
new file mode 100644
index 000000000000..ac9a01f128b7
--- /dev/null
+++ b/arch/arm/configs/rk3066b_sdk_defconfig
@@ -0,0 +1,143 @@
+CONFIG_EXPERIMENTAL=y
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
+CONFIG_LOG_BUF_SHIFT=19
+CONFIG_CGROUPS=y
+CONFIG_CGROUP_DEBUG=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_RESOURCE_COUNTERS=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="root"
+CONFIG_INITRAMFS_COMPRESSION_GZIP=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_PANIC_TIMEOUT=1
+# CONFIG_SYSCTL_SYSCALL is not set
+# CONFIG_ELF_CORE is not set
+CONFIG_ASHMEM=y
+# CONFIG_AIO is not set
+CONFIG_EMBEDDED=y
+CONFIG_MODULES=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_ARCH_RK31=y
+# CONFIG_DDR_TEST is not set
+# CONFIG_RK29_LAST_LOG is not set
+CONFIG_RK_DEBUG_UART=1
+CONFIG_MACH_RK3066B_SDK=y
+# CONFIG_CACHE_L2X0 is not set
+CONFIG_FIQ_DEBUGGER=y
+CONFIG_FIQ_DEBUGGER_NO_SLEEP=y
+CONFIG_FIQ_DEBUGGER_CONSOLE=y
+CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_HIGHMEM=y
+CONFIG_COMPACTION=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
+CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init debug"
+CONFIG_VFP=y
+CONFIG_WAKELOCK=y
+CONFIG_PM_RUNTIME=y
+CONFIG_SUSPEND_TIME=y
+CONFIG_NET=y
+CONFIG_UNIX=y
+# CONFIG_NET_ACTIVITY_STATS is not set
+# CONFIG_WIRELESS is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_MTD=y
+CONFIG_MISC_DEVICES=y
+# CONFIG_ANDROID_PMEM is not set
+CONFIG_INPUT_POLLDEV=y
+# CONFIG_INPUT_MOUSEDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_CONSOLE_TRANSLATIONS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C=y
+CONFIG_I2C0_CONTROLLER_RK30=y
+CONFIG_I2C1_CONTROLLER_RK30=y
+CONFIG_I2C2_CONTROLLER_RK30=y
+# CONFIG_I2C3_RK30 is not set
+# CONFIG_ADC is not set
+CONFIG_EXPANDED_GPIO_NUM=0
+CONFIG_EXPANDED_GPIO_IRQ_NUM=0
+CONFIG_SPI_FPGA_GPIO_NUM=0
+CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0
+# CONFIG_HWMON is not set
+# CONFIG_MFD_SUPPORT is not set
+CONFIG_MEDIA_SUPPORT=y
+CONFIG_VIDEO_DEV=y
+CONFIG_SOC_CAMERA=y
+CONFIG_SOC_CAMERA_OV2659=y
+CONFIG_VIDEO_RK29=y
+CONFIG_VIDEO_RK29_CAMMEM_ION=y
+CONFIG_ION=y
+CONFIG_ION_ROCKCHIP=y
+CONFIG_FB=y
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_DISPLAY_SUPPORT=y
+CONFIG_LCD_TD043MGEA1=y
+CONFIG_FB_ROCKCHIP=y
+CONFIG_LCDC_RK31=y
+CONFIG_LCDC1_RK31=y
+# CONFIG_THREE_FB_BUFFER is not set
+CONFIG_RGA_RK30=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_ARM is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_RK29_SOC=y
+CONFIG_SND_RK29_SOC_I2S_2CH=y
+CONFIG_SND_I2S_DMA_EVENT_STATIC=y
+CONFIG_SND_RK29_SOC_RK1000=y
+CONFIG_SND_RK29_CODEC_SOC_SLAVE=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_PARANOID_SD_INIT=y
+CONFIG_SDMMC_RK29=y
+# CONFIG_SDMMC1_RK29 is not set
+CONFIG_RTC_CLASS=y
+# CONFIG_CMMB is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+# CONFIG_NETWORK_FILESYSTEMS is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_SCHED_DEBUG is not set
+CONFIG_SCHEDSTATS=y
+CONFIG_TIMER_STATS=y
+CONFIG_SLUB_DEBUG_ON=y
+# CONFIG_DEBUG_PREEMPT is not set
+# CONFIG_FTRACE is not set
diff --git a/arch/arm/mach-rk30/Kconfig b/arch/arm/mach-rk30/Kconfig
index 8570164a8175..bbf9fbd1bb63 100755
--- a/arch/arm/mach-rk30/Kconfig
+++ b/arch/arm/mach-rk30/Kconfig
@@ -33,6 +33,9 @@ choice
config MACH_RK31_FPGA
bool "RK31 FPGA board"
+config MACH_RK3066B_SDK
+ bool "RK3066B(RK31) SDK board"
+
endchoice
endif
diff --git a/arch/arm/mach-rk30/Makefile b/arch/arm/mach-rk30/Makefile
index dd80c7fbb443..36026827d73d 100755
--- a/arch/arm/mach-rk30/Makefile
+++ b/arch/arm/mach-rk30/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_MACH_RK30_DS1001B) += board-rk30-ds1001b.o board-rk30-ds1001b-key.o
obj-$(CONFIG_MACH_RK30_PHONE_A22) += board-rk30-phone-a22.o board-rk30-phone-a22-key.o
obj-$(CONFIG_MACH_RK31_FPGA) += board-rk31-fpga.o
+obj-$(CONFIG_MACH_RK3066B_SDK) += board-rk3066b-sdk.o board-rk3066b-sdk-key.o board-rk3066b-sdk-rfkill.o
diff --git a/arch/arm/mach-rk30/board-rk30-sdk-sdmmc.c b/arch/arm/mach-rk30/board-rk30-sdk-sdmmc.c
index 1a1dd79c0d75..df39601eaf4b 100644
--- a/arch/arm/mach-rk30/board-rk30-sdk-sdmmc.c
+++ b/arch/arm/mach-rk30/board-rk30-sdk-sdmmc.c
@@ -25,26 +25,17 @@ static void rk29_sdmmc_gpio_open(int device_id, int on)
#ifdef CONFIG_SDMMC0_RK29
if(on)
{
- #if defined(CONFIG_ARCH_RK30)
gpio_direction_output(GPIO3B_GPIO3B0,GPIO_HIGH);//set mmc0-clk to high
gpio_direction_output(GPIO3B_GPIO3B1,GPIO_HIGH);// set mmc0-cmd to high.
gpio_direction_output(GPIO3B_GPIO3B2,GPIO_HIGH);//set mmc0-data0 to high.
gpio_direction_output(GPIO3B_GPIO3B3,GPIO_HIGH);//set mmc0-data1 to high.
gpio_direction_output(GPIO3B_GPIO3B4,GPIO_HIGH);//set mmc0-data2 to high.
gpio_direction_output(GPIO3B_GPIO3B5,GPIO_HIGH);//set mmc0-data3 to high.
- #elif defined(CONFIG_ARCH_RK31)
- gpio_direction_output(RK30_PIN3_PA2,GPIO_HIGH);//set mmc0-clk to high
- gpio_direction_output(RK30_PIN3_PA3,GPIO_HIGH);// set mmc0-cmd to high.
- gpio_direction_output(RK30_PIN3_PA4,GPIO_HIGH);//set mmc0-data0 to high.
- gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high.
- gpio_direction_output(RK30_PIN3_PA6,GPIO_HIGH);//set mmc0-data2 to high.
- gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high.
- #endif
+
mdelay(30);
}
else
{
- #if defined(CONFIG_ARCH_RK30)
rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_GPIO3B0);
gpio_request(RK30_PIN3_PB0, "mmc0-clk");
gpio_direction_output(RK30_PIN3_PB0,GPIO_LOW);//set mmc0-clk to low.
@@ -68,31 +59,7 @@ static void rk29_sdmmc_gpio_open(int device_id, int on)
rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_GPIO3B5);
gpio_request(RK30_PIN3_PB5, "mmc0-data3");
gpio_direction_output(RK30_PIN3_PB5,GPIO_LOW);//set mmc0-data3 to low.
- #elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_GPIO3A2);
- gpio_request(RK30_PIN3_PA2, "mmc0-clk");
- gpio_direction_output(RK30_PIN3_PA2,GPIO_LOW);//set mmc0-clk to low.
-
- rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_GPIO3A3);
- gpio_request(RK30_PIN3_PA3, "mmc0-cmd");
- gpio_direction_output(RK30_PIN3_PA3,GPIO_LOW);//set mmc0-cmd to low.
-
- rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_GPIO3A4);
- gpio_request(RK30_PIN3_PA4, "mmc0-data0");
- gpio_direction_output(RK30_PIN3_PA4,GPIO_LOW);//set mmc0-data0 to low.
-
- rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5);
- gpio_request(RK30_PIN3_PA5, "mmc0-data1");
- gpio_direction_output(RK30_PIN3_PA5,GPIO_LOW);//set mmc0-data1 to low.
-
- rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6);
- gpio_request(RK30_PIN3_PA6, "mmc0-data2");
- gpio_direction_output(RK30_PIN3_PA6,GPIO_LOW);//set mmc0-data2 to low.
-
- rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7);
- gpio_request(RK30_PIN3_PA7, "mmc0-data3");
- gpio_direction_output(RK30_PIN3_PA7,GPIO_LOW);//set mmc0-data3 to low.
- #endif
+
mdelay(30);
}
#endif
@@ -114,7 +81,6 @@ static void rk29_sdmmc_gpio_open(int device_id, int on)
}
else
{
- #if defined(CONFIG_ARCH_RK30)
rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_GPIO3C5);
gpio_request(RK30_PIN3_PC5, "mmc1-clk");
gpio_direction_output(RK30_PIN3_PC5,GPIO_LOW);//set mmc1-clk to low.
@@ -126,19 +92,7 @@ static void rk29_sdmmc_gpio_open(int device_id, int on)
rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_GPIO3C1);
gpio_request(RK30_PIN3_PC1, "mmc1-data0");
gpio_direction_output(RK30_PIN3_PC1,GPIO_LOW);//set mmc1-data0 to low.
- #elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_GPIO3C5);
- gpio_request(RK30_PIN3_PC5, "mmc1-clk");
- gpio_direction_output(RK30_PIN3_PC5,GPIO_LOW);//set mmc1-clk to low.
- rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_GPIO3C0);
- gpio_request(RK30_PIN3_PC0, "mmc1-cmd");
- gpio_direction_output(RK30_PIN3_PC0,GPIO_LOW);//set mmc1-cmd to low.
-
- rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_GPIO3C1);
- gpio_request(RK30_PIN3_PC1, "mmc1-data0");
- gpio_direction_output(RK30_PIN3_PC1,GPIO_LOW);//set mmc1-data0 to low.
- #endif
mdelay(100);
}
#endif
@@ -160,15 +114,9 @@ static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
case 1://SDMMC_CTYPE_4BIT:
{
- #if defined(CONFIG_ARCH_RK30)
rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_SDMMC0_DATA1);
rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_SDMMC0_DATA2);
rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_SDMMC0_DATA3);
- #elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_SDMMC0DATA1);
- rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_SDMMC0DATA2);
- rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_SDMMC0DATA3);
- #endif
}
break;
@@ -176,7 +124,6 @@ static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
break;
case 0xFFFF: //gpio_reset
{
- #if defined(CONFIG_ARCH_RK30)
rk30_mux_api_set(GPIO3A7_SDMMC0PWREN_NAME, GPIO3A_GPIO3A7);
gpio_request(RK30_PIN3_PA7,"sdmmc-power");
gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH); //power-off
@@ -186,26 +133,14 @@ static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
gpio_direction_output(RK30_PIN3_PA7,GPIO_LOW); //power-on
rk29_sdmmc_gpio_open(0, 1);
- #elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3A1_SDMMC0PWREN_NAME, GPIO3A_GPIO3A1);
- gpio_request(RK30_PIN3_PA1,"sdmmc-power");
- gpio_direction_output(RK30_PIN3_PA1,GPIO_HIGH); //power-off
-
- rk29_sdmmc_gpio_open(0, 0);
-
- gpio_direction_output(RK30_PIN3_PA1,GPIO_LOW); //power-on
-
- rk29_sdmmc_gpio_open(0, 1);
- #endif
}
break;
default: //case 0://SDMMC_CTYPE_1BIT:
{
- #if defined(CONFIG_ARCH_RK30)
- rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_SDMMC0_CMD);
- rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_SDMMC0_CLKOUT);
- rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_SDMMC0_DATA0);
+ rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_SDMMC0_CMD);
+ rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_SDMMC0_CLKOUT);
+ rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_SDMMC0_DATA0);
rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_GPIO3B3);
gpio_request(RK30_PIN3_PB3, "mmc0-data1");
@@ -218,23 +153,6 @@ static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_GPIO3B5);
gpio_request(RK30_PIN3_PB5, "mmc0-data3");
gpio_direction_output(RK30_PIN3_PB5,GPIO_HIGH);//set mmc0-data3 to high.
- #elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_SDMMC0CMD);
- rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_SDMMC0CLKOUT);
- rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_SDMMC0DATA0);
-
- rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5);
- gpio_request(RK30_PIN3_PA5, "mmc0-data1");
- gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high.
-
- rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6);
- gpio_request(RK30_PIN3_PA5, "mmc0-data2");
- gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data2 to high.
-
- rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7);
- gpio_request(RK30_PIN3_PA7, "mmc0-data3");
- gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high.
- #endif
}
break;
}
@@ -242,21 +160,12 @@ static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
static void rk29_sdmmc_set_iomux_mmc1(unsigned int bus_width)
{
-#if defined(CONFIG_ARCH_RK30)
rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_SMMC1_CMD);
rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_SDMMC1_CLKOUT);
rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_SDMMC1_DATA0);
rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_SDMMC1_DATA1);
rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_SDMMC1_DATA2);
rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_SDMMC1_DATA3);
-#elif defined(CONFIG_ARCH_RK31)
- rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_SDMMC1CMD);
- rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_SDMMC1CLKOUT);
- rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_SDMMC1DATA0);
- rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_RMIITXD0_NAME, GPIO3C_SDMMC1DATA1);
- rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_RMIIRXD0_NAME, GPIO3C_SDMMC1DATA2);
- rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_RMIIRXD1_NAME, GPIO3C_SDMMC1DATA3);
-#endif
}
static void rk29_sdmmc_set_iomux_mmc2(unsigned int bus_width)
diff --git a/arch/arm/mach-rk30/board-rk3066b-sdk-key.c b/arch/arm/mach-rk30/board-rk3066b-sdk-key.c
new file mode 100644
index 000000000000..24c71eb9cb16
--- /dev/null
+++ b/arch/arm/mach-rk30/board-rk3066b-sdk-key.c
@@ -0,0 +1,65 @@
+#include <mach/gpio.h>
+#include <plat/key.h>
+
+#define EV_ENCALL KEY_F4
+#define EV_MENU KEY_F1
+
+#define PRESS_LEV_LOW 1
+#define PRESS_LEV_HIGH 0
+
+static struct rk29_keys_button key_button[] = {
+ {
+ .desc = "vol-",
+ .code = KEY_VOLUMEDOWN,
+ .gpio = RK30_PIN0_PB5,
+ .active_low = PRESS_LEV_LOW,
+ },
+ {
+ .desc = "play",
+ .code = KEY_POWER,
+ .gpio = RK30_PIN0_PA4,
+ .active_low = PRESS_LEV_LOW,
+ .wakeup = 1,
+ },
+ {
+ .desc = "vol+",
+ .code = KEY_VOLUMEUP,
+ .adc_value = 1,
+ .gpio = INVALID_GPIO,
+ .active_low = PRESS_LEV_LOW,
+ },
+ {
+ .desc = "menu",
+ .code = EV_MENU,
+ .adc_value = 155,
+ .gpio = INVALID_GPIO,
+ .active_low = PRESS_LEV_LOW,
+ },
+ {
+ .desc = "home",
+ .code = KEY_HOME,
+ .adc_value = 630,
+ .gpio = INVALID_GPIO,
+ .active_low = PRESS_LEV_LOW,
+ },
+ {
+ .desc = "esc",
+ .code = KEY_BACK,
+ .adc_value = 386,
+ .gpio = INVALID_GPIO,
+ .active_low = PRESS_LEV_LOW,
+ },
+ {
+ .desc = "camera",
+ .code = KEY_CAMERA,
+ .adc_value = 827,
+ .gpio = INVALID_GPIO,
+ .active_low = PRESS_LEV_LOW,
+ },
+};
+struct rk29_keys_platform_data rk29_keys_pdata = {
+ .buttons = key_button,
+ .nbuttons = ARRAY_SIZE(key_button),
+ .chn = 1, //chn: 0-7, if do not use ADC,set 'chn' -1
+};
+
diff --git a/arch/arm/mach-rk30/board-rk3066b-sdk-rfkill.c b/arch/arm/mach-rk30/board-rk3066b-sdk-rfkill.c
new file mode 100644
index 000000000000..ccb50e49d526
--- /dev/null
+++ b/arch/arm/mach-rk30/board-rk3066b-sdk-rfkill.c
@@ -0,0 +1,449 @@
+/*
+ * Copyright (C) 2010 ROCKCHIP, Inc.
+ * Author: roger_chen <cz@rock-chips.com>
+ *
+ * This program is the bluetooth device bcm4329's driver,
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/rfkill.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wakelock.h>
+#include <linux/fs.h>
+#include <asm/uaccess.h>
+#include <mach/gpio.h>
+#include <asm/irq.h>
+#include <mach/iomux.h>
+#include <linux/wakelock.h>
+#include <linux/timer.h>
+#include <mach/board.h>
+
+#if 0
+#define DBG(x...) printk(KERN_INFO "[BT_RFKILL]: "x)
+#else
+#define DBG(x...)
+#endif
+
+#define LOG(x...) printk(KERN_INFO "[BT_RFKILL]: "x)
+
+#ifdef CONFIG_BCM4329
+#define WIFI_BT_POWER_TOGGLE 1
+#else
+#define WIFI_BT_POWER_TOGGLE 0
+#endif
+
+#define BT_WAKE_LOCK_TIMEOUT 10 //s
+
+#define BT_AUTO_SLEEP_TIMEOUT 3
+
+/*
+ * IO Configuration for RK29
+ */
+#ifdef CONFIG_ARCH_RK29
+
+#define BT_WAKE_HOST_SUPPORT 0
+
+/* IO configuration */
+// BT power pin
+#define BT_GPIO_POWER RK29_PIN5_PD6
+#define IOMUX_BT_GPIO_POWER() rk29_mux_api_set(GPIO5D6_SDMMC1PWREN_NAME, GPIO5H_GPIO5D6);
+
+// BT reset pin
+#define BT_GPIO_RESET RK29_PIN6_PC4
+#define IOMUX_BT_GPIO_RESET()
+
+// BT wakeup pin
+#define BT_GPIO_WAKE_UP RK29_PIN6_PC5
+#define IOMUX_BT_GPIO_WAKE_UP()
+
+// BT wakeup host pin
+#define BT_GPIO_WAKE_UP_HOST
+#define IOMUX_BT_GPIO_WAKE_UP_HOST()
+
+//bt cts paired to uart rts
+#define UART_RTS RK29_PIN2_PA7
+#define IOMUX_UART_RTS_GPIO() rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_GPIO2A7)
+#define IOMUX_UART_RTS() rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N)
+
+/*
+ * IO Configuration for RK30
+ */
+#elif defined (CONFIG_ARCH_RK31)
+
+#define BT_WAKE_HOST_SUPPORT 1
+
+/* IO configuration */
+// BT power pin
+#define BT_GPIO_POWER RK30_PIN3_PC6
+#define IOMUX_BT_GPIO_POWER() rk29_mux_api_set(GPIO3C6_SDMMC1DETECTN_RMIIRXERR_NAME, GPIO3C_GPIO3C6);
+
+// BT reset pin
+#define BT_GPIO_RESET RK30_PIN3_PD0
+#define IOMUX_BT_GPIO_RESET() rk29_mux_api_set(GPIO3D0_SDMMC1PWREN_MIIMD_NAME, GPIO3D_GPIO3D0);
+
+// BT wakeup pin
+#define BT_GPIO_WAKE_UP RK30_PIN3_PC5
+#define IOMUX_BT_GPIO_WAKE_UP() rk29_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_GPIO3C5);
+
+// BT wakeup host pin
+#define BT_GPIO_WAKE_UP_HOST RK30_PIN0_PA5
+#define BT_IRQ_WAKE_UP_HOST gpio_to_irq(BT_GPIO_WAKE_UP_HOST)
+#define IOMUX_BT_GPIO_WAKE_UP_HOST()
+
+//bt cts paired to uart rts
+#define UART_RTS RK30_PIN1_PA3
+#define IOMUX_UART_RTS_GPIO() rk29_mux_api_set(GPIO1A3_UART0RTSN_NAME, GPIO1A_GPIO1A3)
+#define IOMUX_UART_RTS() rk29_mux_api_set(GPIO1A3_UART0RTSN_NAME, GPIO1A_UART0RTSN)
+
+#endif
+
+struct bt_ctrl
+{
+ struct rfkill *bt_rfk;
+#if BT_WAKE_HOST_SUPPORT
+ struct timer_list tl;
+ bool b_HostWake;
+ struct wake_lock bt_wakelock;
+#endif
+};
+
+static const char bt_name[] =
+#if defined(CONFIG_RKWIFI)
+ #if defined(CONFIG_RKWIFI_26M)
+ "rk903_26M"
+ #else
+ "rk903"
+ #endif
+#elif defined(CONFIG_BCM4329)
+ "bcm4329"
+#elif defined(CONFIG_MV8787)
+ "mv8787"
+#else
+ "bt_default"
+#endif
+;
+
+#if WIFI_BT_POWER_TOGGLE
+extern int rk29sdk_bt_power_state;
+extern int rk29sdk_wifi_power_state;
+#endif
+
+struct bt_ctrl gBtCtrl;
+struct timer_list bt_sleep_tl;
+
+void bcm4325_sleep(unsigned long bSleep);
+
+#if BT_WAKE_HOST_SUPPORT
+void resetBtHostSleepTimer(void)
+{
+ mod_timer(&(gBtCtrl.tl),jiffies + BT_WAKE_LOCK_TIMEOUT*HZ);//ÔÙÖØÐÂÉèÖó¬Ê±Öµ¡£
+}
+
+void btWakeupHostLock(void)
+{
+ if(gBtCtrl.b_HostWake == false){
+ DBG("** Lock **\n");
+ wake_lock(&(gBtCtrl.bt_wakelock));
+ gBtCtrl.b_HostWake = true;
+ }
+}
+
+void btWakeupHostUnlock(void)
+{
+ if(gBtCtrl.b_HostWake == true){
+ DBG("** UnLock **\n");
+ wake_unlock(&(gBtCtrl.bt_wakelock)); //ÈÃϵͳ˯Ãß
+ gBtCtrl.b_HostWake = false;
+ }
+}
+
+static void timer_hostSleep(unsigned long arg)
+{
+ DBG("b_HostWake=%d\n", gBtCtrl.b_HostWake);
+ btWakeupHostUnlock();
+}
+
+#ifdef CONFIG_PM
+static irqreturn_t bcm4329_wake_host_irq(int irq, void *dev)
+{
+ DBG("%s\n",__FUNCTION__);
+
+ btWakeupHostLock();
+ resetBtHostSleepTimer();
+ return IRQ_HANDLED;
+}
+
+static void rfkill_do_wakeup(struct work_struct *work)
+{
+ // disable bt wakeup host
+ DBG("** free irq\n");
+ free_irq(BT_IRQ_WAKE_UP_HOST, NULL);
+
+ DBG("Enable UART_RTS\n");
+ gpio_set_value(UART_RTS, GPIO_LOW);
+ IOMUX_UART_RTS();
+}
+
+static DECLARE_DELAYED_WORK(wakeup_work, rfkill_do_wakeup);
+
+static int bcm4329_rfkill_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ DBG("%s\n",__FUNCTION__);
+
+ cancel_delayed_work(&wakeup_work);
+
+#ifdef CONFIG_BT_AUTOSLEEP
+ bcm4325_sleep(1);
+#endif
+
+ DBG("Disable UART_RTS\n");
+ //To prevent uart to receive bt data when suspended
+ IOMUX_UART_RTS_GPIO();
+ gpio_request(UART_RTS, "uart_rts");
+ gpio_set_value(UART_RTS, GPIO_HIGH);
+
+ // enable bt wakeup host
+ DBG("Request irq for bt wakeup host\n");
+ if (0 == request_irq(BT_IRQ_WAKE_UP_HOST,
+ bcm4329_wake_host_irq,
+ IRQF_TRIGGER_FALLING,
+ "bt_wake",
+ NULL))
+ enable_irq_wake(BT_IRQ_WAKE_UP_HOST);
+ else
+ LOG("Failed to request BT_WAKE_UP_HOST irq\n");
+
+#ifdef CONFIG_RFKILL_RESET
+ extern void rfkill_set_block(struct rfkill *rfkill, bool blocked);
+ rfkill_set_block(gBtCtrl.bt_rfk, true);
+#endif
+
+ return 0;
+}
+
+static int bcm4329_rfkill_resume(struct platform_device *pdev)
+{
+ DBG("%s\n",__FUNCTION__);
+
+ // ϵͳÍ˳ö¶þ¼¶Ë¯ÃߺóÐèÒªÀµÍRTS£¬´Ó¶ø²ÅÔÊÐíBT·¢Êý¾Ý¹ýÀ´
+ // µ«ÊÇÄ¿Ç°·¢ÏÖÔÚresumeº¯ÊýÖÐÖ±½ÓÀµÍRTS»áµ¼ÖÂBTÊý¾Ý¶ªÊ§
+ // ËùÒÔÑÓ³Ù1sºóÔÙÀµÍRTS
+ // ϵͳÍ˳ö¶þ¼¶Ë¯ÃßʱÊͷŵôBT_IRQ_WAKE_UP_HOST£¬ÔÚ˯ÃßʱºòÔÙ
+ // ´ÎÉêÇ룬Ŀǰ·¢ÏÖÖжϻص÷º¯Êý±Èresume¸üÍíÖ´ÐУ¬Èç¹ûresume
+ // ʱֱ½ÓfreeµôIRQ£¬»áµ¼ÖÂÖжϻص÷º¯Êý²»»á±»Ö´ÐУ¬
+ DBG("delay 1s\n");
+ schedule_delayed_work(&wakeup_work, HZ);
+
+ return 0;
+}
+#else
+#define bcm4329_rfkill_suspend NULL
+#define bcm4329_rfkill_resume NULL
+#endif
+
+#else
+#ifdef CONFIG_PM
+static int bcm4329_rfkill_suspend(struct platform_device *pdev, pm_message_t state)
+{
+#ifdef CONFIG_BT_AUTOSLEEP
+ bcm4325_sleep(1);
+#endif
+ return 0;
+}
+#else
+#define bcm4329_rfkill_suspend NULL
+#endif
+#define bcm4329_rfkill_resume NULL
+#endif
+
+void bcm4325_sleep(unsigned long bSleep)
+{
+ DBG("*** bt sleep: %d ***\n", bSleep);
+#ifdef CONFIG_BT_AUTOSLEEP
+ del_timer(&bt_sleep_tl);// cmy: È·±£ÔÚ»½ÐÑBTʱ£¬²»»áÒò´¥·¢bt_sleep_tl¶øÂíÉÏ˯Ãß
+#endif
+
+ IOMUX_BT_GPIO_WAKE_UP();
+ gpio_set_value(BT_GPIO_WAKE_UP, bSleep?GPIO_LOW:GPIO_HIGH);
+
+#ifdef CONFIG_BT_AUTOSLEEP
+ if(!bSleep)
+ mod_timer(&bt_sleep_tl, jiffies + BT_AUTO_SLEEP_TIMEOUT*HZ);//ÔÙÖØÐÂÉèÖó¬Ê±Öµ¡£
+#endif
+}
+
+static int bcm4329_set_block(void *data, bool blocked)
+{
+ DBG("set blocked :%d\n", blocked);
+
+ IOMUX_BT_GPIO_POWER();
+ IOMUX_BT_GPIO_RESET();
+
+ if (false == blocked) {
+ gpio_set_value(BT_GPIO_POWER, GPIO_HIGH); /* bt power on */
+ mdelay(20);
+
+ gpio_set_value(BT_GPIO_RESET, GPIO_LOW);
+ mdelay(20);
+ gpio_set_value(BT_GPIO_RESET, GPIO_HIGH); /* bt reset deactive*/
+
+ mdelay(20);
+ bcm4325_sleep(0); // ensure bt is wakeup
+
+ pr_info("bt turn on power\n");
+ } else {
+#if WIFI_BT_POWER_TOGGLE
+ if (!rk29sdk_wifi_power_state) {
+#endif
+ gpio_set_value(BT_GPIO_POWER, GPIO_LOW); /* bt power off */
+ mdelay(20);
+ pr_info("bt shut off power\n");
+#if WIFI_BT_POWER_TOGGLE
+ }else {
+ pr_info("bt shouldn't shut off power, wifi is using it!\n");
+ }
+#endif
+
+ gpio_set_value(BT_GPIO_RESET, GPIO_LOW); /* bt reset active*/
+ mdelay(20);
+ }
+
+#if WIFI_BT_POWER_TOGGLE
+ rk29sdk_bt_power_state = !blocked;
+#endif
+ return 0;
+}
+
+static const struct rfkill_ops bcm4329_rfk_ops = {
+ .set_block = bcm4329_set_block,
+};
+
+static int __devinit bcm4329_rfkill_probe(struct platform_device *pdev)
+{
+ int rc = 0;
+ bool default_state = true;
+
+ DBG("Enter %s\n",__FUNCTION__);
+
+ /* default to bluetooth off */
+ bcm4329_set_block(NULL, default_state); /* blocked -> bt off */
+
+ gBtCtrl.bt_rfk = rfkill_alloc(bt_name,
+ NULL,
+ RFKILL_TYPE_BLUETOOTH,
+ &bcm4329_rfk_ops,
+ NULL);
+
+ if (!gBtCtrl.bt_rfk)
+ {
+ LOG("fail to rfkill_allocate\n");
+ return -ENOMEM;
+ }
+
+ rfkill_set_states(gBtCtrl.bt_rfk, default_state, false);
+
+ rc = rfkill_register(gBtCtrl.bt_rfk);
+ if (rc)
+ {
+ LOG("failed to rfkill_register,rc=0x%x\n",rc);
+ rfkill_destroy(gBtCtrl.bt_rfk);
+ }
+
+ gpio_request(BT_GPIO_POWER, NULL);
+ gpio_request(BT_GPIO_RESET, NULL);
+ gpio_request(BT_GPIO_WAKE_UP, NULL);
+
+#ifdef CONFIG_BT_AUTOSLEEP
+ init_timer(&bt_sleep_tl);
+ bt_sleep_tl.expires = 0;
+ bt_sleep_tl.function = bcm4325_sleep;
+ bt_sleep_tl.data = 1;
+ add_timer(&bt_sleep_tl);
+#endif
+
+#if BT_WAKE_HOST_SUPPORT
+ init_timer(&(gBtCtrl.tl));
+ gBtCtrl.tl.expires = 0;
+ gBtCtrl.tl.function = timer_hostSleep;
+ add_timer(&(gBtCtrl.tl));
+ gBtCtrl.b_HostWake = false;
+
+ wake_lock_init(&(gBtCtrl.bt_wakelock), WAKE_LOCK_SUSPEND, "bt_wake");
+
+ rc = gpio_request(BT_GPIO_WAKE_UP_HOST, "bt_wake");
+ if (rc) {
+ LOG("Failed to request BT_WAKE_UP_HOST\n");
+ }
+
+ IOMUX_BT_GPIO_WAKE_UP_HOST();
+ gpio_pull_updown(BT_GPIO_WAKE_UP_HOST,GPIOPullUp);
+ #endif
+
+ LOG("bcm4329 module has been initialized,rc=0x%x\n",rc);
+
+ return rc;
+}
+
+
+static int __devexit bcm4329_rfkill_remove(struct platform_device *pdev)
+{
+ if (gBtCtrl.bt_rfk)
+ rfkill_unregister(gBtCtrl.bt_rfk);
+ gBtCtrl.bt_rfk = NULL;
+#if BT_WAKE_HOST_SUPPORT
+ del_timer(&(gBtCtrl.tl));//ɾµô¶¨Ê±Æ÷
+ btWakeupHostUnlock();
+ wake_lock_destroy(&(gBtCtrl.bt_wakelock));
+#endif
+#ifdef CONFIG_BT_AUTOSLEEP
+ del_timer(&bt_sleep_tl);
+#endif
+
+ platform_set_drvdata(pdev, NULL);
+
+ DBG("Enter %s\n",__FUNCTION__);
+ return 0;
+}
+
+static struct platform_driver bcm4329_rfkill_driver = {
+ .probe = bcm4329_rfkill_probe,
+ .remove = __devexit_p(bcm4329_rfkill_remove),
+ .driver = {
+ .name = "rk29sdk_rfkill",
+ .owner = THIS_MODULE,
+ },
+ .suspend = bcm4329_rfkill_suspend,
+ .resume = bcm4329_rfkill_resume,
+};
+
+/*
+ * Module initialization
+ */
+static int __init bcm4329_mod_init(void)
+{
+ int ret;
+ DBG("Enter %s\n",__FUNCTION__);
+ ret = platform_driver_register(&bcm4329_rfkill_driver);
+ LOG("ret=0x%x\n", ret);
+ return ret;
+}
+
+static void __exit bcm4329_mod_exit(void)
+{
+ platform_driver_unregister(&bcm4329_rfkill_driver);
+}
+
+module_init(bcm4329_mod_init);
+module_exit(bcm4329_mod_exit);
+MODULE_DESCRIPTION("bcm4329 Bluetooth driver");
+MODULE_AUTHOR("roger_chen cz@rock-chips.com, cmy@rock-chips.com");
+MODULE_LICENSE("GPL");
+
diff --git a/arch/arm/mach-rk30/board-rk3066b-sdk-sdmmc.c b/arch/arm/mach-rk30/board-rk3066b-sdk-sdmmc.c
new file mode 100644
index 000000000000..d444e52d411b
--- /dev/null
+++ b/arch/arm/mach-rk30/board-rk3066b-sdk-sdmmc.c
@@ -0,0 +1,532 @@
+/* arch/arm/mach-rk30/board-rk30-sdk-sdmmc.c
+ *
+ * Copyright (C) 2012 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifdef CONFIG_SDMMC_RK29
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+static void rk29_sdmmc_gpio_open(int device_id, int on)
+{
+ switch(device_id)
+ {
+ case 0://mmc0
+ {
+ #ifdef CONFIG_SDMMC0_RK29
+ if(on)
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ gpio_direction_output(GPIO3B_GPIO3B0,GPIO_HIGH);//set mmc0-clk to high
+ gpio_direction_output(GPIO3B_GPIO3B1,GPIO_HIGH);// set mmc0-cmd to high.
+ gpio_direction_output(GPIO3B_GPIO3B2,GPIO_HIGH);//set mmc0-data0 to high.
+ gpio_direction_output(GPIO3B_GPIO3B3,GPIO_HIGH);//set mmc0-data1 to high.
+ gpio_direction_output(GPIO3B_GPIO3B4,GPIO_HIGH);//set mmc0-data2 to high.
+ gpio_direction_output(GPIO3B_GPIO3B5,GPIO_HIGH);//set mmc0-data3 to high.
+ #elif defined(CONFIG_ARCH_RK31)
+ gpio_direction_output(RK30_PIN3_PA2,GPIO_HIGH);//set mmc0-clk to high
+ gpio_direction_output(RK30_PIN3_PA3,GPIO_HIGH);// set mmc0-cmd to high.
+ gpio_direction_output(RK30_PIN3_PA4,GPIO_HIGH);//set mmc0-data0 to high.
+ gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high.
+ gpio_direction_output(RK30_PIN3_PA6,GPIO_HIGH);//set mmc0-data2 to high.
+ gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high.
+ #endif
+ mdelay(30);
+ }
+ else
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_GPIO3B0);
+ gpio_request(RK30_PIN3_PB0, "mmc0-clk");
+ gpio_direction_output(RK30_PIN3_PB0,GPIO_LOW);//set mmc0-clk to low.
+
+ rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_GPIO3B1);
+ gpio_request(RK30_PIN3_PB1, "mmc0-cmd");
+ gpio_direction_output(RK30_PIN3_PB1,GPIO_LOW);//set mmc0-cmd to low.
+
+ rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_GPIO3B2);
+ gpio_request(RK30_PIN3_PB2, "mmc0-data0");
+ gpio_direction_output(RK30_PIN3_PB2,GPIO_LOW);//set mmc0-data0 to low.
+
+ rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_GPIO3B3);
+ gpio_request(RK30_PIN3_PB3, "mmc0-data1");
+ gpio_direction_output(RK30_PIN3_PB3,GPIO_LOW);//set mmc0-data1 to low.
+
+ rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_GPIO3B4);
+ gpio_request(RK30_PIN3_PB4, "mmc0-data2");
+ gpio_direction_output(RK30_PIN3_PB4,GPIO_LOW);//set mmc0-data2 to low.
+
+ rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_GPIO3B5);
+ gpio_request(RK30_PIN3_PB5, "mmc0-data3");
+ gpio_direction_output(RK30_PIN3_PB5,GPIO_LOW);//set mmc0-data3 to low.
+ #elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_GPIO3A2);
+ gpio_request(RK30_PIN3_PA2, "mmc0-clk");
+ gpio_direction_output(RK30_PIN3_PA2,GPIO_LOW);//set mmc0-clk to low.
+
+ rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_GPIO3A3);
+ gpio_request(RK30_PIN3_PA3, "mmc0-cmd");
+ gpio_direction_output(RK30_PIN3_PA3,GPIO_LOW);//set mmc0-cmd to low.
+
+ rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_GPIO3A4);
+ gpio_request(RK30_PIN3_PA4, "mmc0-data0");
+ gpio_direction_output(RK30_PIN3_PA4,GPIO_LOW);//set mmc0-data0 to low.
+
+ rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5);
+ gpio_request(RK30_PIN3_PA5, "mmc0-data1");
+ gpio_direction_output(RK30_PIN3_PA5,GPIO_LOW);//set mmc0-data1 to low.
+
+ rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6);
+ gpio_request(RK30_PIN3_PA6, "mmc0-data2");
+ gpio_direction_output(RK30_PIN3_PA6,GPIO_LOW);//set mmc0-data2 to low.
+
+ rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7);
+ gpio_request(RK30_PIN3_PA7, "mmc0-data3");
+ gpio_direction_output(RK30_PIN3_PA7,GPIO_LOW);//set mmc0-data3 to low.
+ #endif
+ mdelay(30);
+ }
+ #endif
+ }
+ break;
+
+ case 1://mmc1
+ {
+ #ifdef CONFIG_SDMMC1_RK29
+ if(on)
+ {
+ gpio_direction_output(RK30_PIN3_PC5,GPIO_HIGH);//set mmc1-clk to high
+ gpio_direction_output(RK30_PIN3_PC0,GPIO_HIGH);//set mmc1-cmd to high.
+ gpio_direction_output(RK30_PIN3_PC1,GPIO_HIGH);//set mmc1-data0 to high.
+ gpio_direction_output(RK30_PIN3_PC2,GPIO_HIGH);//set mmc1-data1 to high.
+ gpio_direction_output(RK30_PIN3_PC3,GPIO_HIGH);//set mmc1-data2 to high.
+ gpio_direction_output(RK30_PIN3_PC5,GPIO_HIGH);//set mmc1-data3 to high.
+ mdelay(100);
+ }
+ else
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_GPIO3C5);
+ gpio_request(RK30_PIN3_PC5, "mmc1-clk");
+ gpio_direction_output(RK30_PIN3_PC5,GPIO_LOW);//set mmc1-clk to low.
+
+ rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_GPIO3C0);
+ gpio_request(RK30_PIN3_PC0, "mmc1-cmd");
+ gpio_direction_output(RK30_PIN3_PC0,GPIO_LOW);//set mmc1-cmd to low.
+
+ rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_GPIO3C1);
+ gpio_request(RK30_PIN3_PC1, "mmc1-data0");
+ gpio_direction_output(RK30_PIN3_PC1,GPIO_LOW);//set mmc1-data0 to low.
+ #elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_GPIO3C5);
+ gpio_request(RK30_PIN3_PC5, "mmc1-clk");
+ gpio_direction_output(RK30_PIN3_PC5,GPIO_LOW);//set mmc1-clk to low.
+
+ rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_GPIO3C0);
+ gpio_request(RK30_PIN3_PC0, "mmc1-cmd");
+ gpio_direction_output(RK30_PIN3_PC0,GPIO_LOW);//set mmc1-cmd to low.
+
+ rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_GPIO3C1);
+ gpio_request(RK30_PIN3_PC1, "mmc1-data0");
+ gpio_direction_output(RK30_PIN3_PC1,GPIO_LOW);//set mmc1-data0 to low.
+ #endif
+ mdelay(100);
+ }
+ #endif
+ }
+ break;
+
+ case 2: //mmc2
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void rk29_sdmmc_set_iomux_mmc0(unsigned int bus_width)
+{
+ switch (bus_width)
+ {
+
+ case 1://SDMMC_CTYPE_4BIT:
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_SDMMC0_DATA1);
+ rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_SDMMC0_DATA2);
+ rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_SDMMC0_DATA3);
+ #elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_SDMMC0DATA1);
+ rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_SDMMC0DATA2);
+ rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_SDMMC0DATA3);
+ #endif
+ }
+ break;
+
+ case 0x10000://SDMMC_CTYPE_8BIT:
+ break;
+ case 0xFFFF: //gpio_reset
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3A7_SDMMC0PWREN_NAME, GPIO3A_GPIO3A7);
+ gpio_request(RK30_PIN3_PA7,"sdmmc-power");
+ gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH); //power-off
+
+ rk29_sdmmc_gpio_open(0, 0);
+
+ gpio_direction_output(RK30_PIN3_PA7,GPIO_LOW); //power-on
+
+ rk29_sdmmc_gpio_open(0, 1);
+ #elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3A1_SDMMC0PWREN_NAME, GPIO3A_GPIO3A1);
+ gpio_request(RK30_PIN3_PA1,"sdmmc-power");
+ gpio_direction_output(RK30_PIN3_PA1,GPIO_HIGH); //power-off
+
+ rk29_sdmmc_gpio_open(0, 0);
+
+ gpio_direction_output(RK30_PIN3_PA1,GPIO_LOW); //power-on
+
+ rk29_sdmmc_gpio_open(0, 1);
+ #endif
+ }
+ break;
+
+ default: //case 0://SDMMC_CTYPE_1BIT:
+ {
+ #if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_SDMMC0_CMD);
+ rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_SDMMC0_CLKOUT);
+ rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_SDMMC0_DATA0);
+
+ rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_GPIO3B3);
+ gpio_request(RK30_PIN3_PB3, "mmc0-data1");
+ gpio_direction_output(RK30_PIN3_PB3,GPIO_HIGH);//set mmc0-data1 to high.
+
+ rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_GPIO3B4);
+ gpio_request(RK30_PIN3_PB4, "mmc0-data2");
+ gpio_direction_output(RK30_PIN3_PB4,GPIO_HIGH);//set mmc0-data2 to high.
+
+ rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_GPIO3B5);
+ gpio_request(RK30_PIN3_PB5, "mmc0-data3");
+ gpio_direction_output(RK30_PIN3_PB5,GPIO_HIGH);//set mmc0-data3 to high.
+ #elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3A3_SDMMC0CMD_NAME, GPIO3A_SDMMC0CMD);
+ rk30_mux_api_set(GPIO3A2_SDMMC0CLKOUT_NAME, GPIO3A_SDMMC0CLKOUT);
+ rk30_mux_api_set(GPIO3A4_SDMMC0DATA0_NAME, GPIO3A_SDMMC0DATA0);
+
+ rk30_mux_api_set(GPIO3A5_SDMMC0DATA1_NAME, GPIO3A_GPIO3A5);
+ gpio_request(RK30_PIN3_PA5, "mmc0-data1");
+ gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data1 to high.
+
+ rk30_mux_api_set(GPIO3A6_SDMMC0DATA2_NAME, GPIO3A_GPIO3A6);
+ gpio_request(RK30_PIN3_PA5, "mmc0-data2");
+ gpio_direction_output(RK30_PIN3_PA5,GPIO_HIGH);//set mmc0-data2 to high.
+
+ rk30_mux_api_set(GPIO3A7_SDMMC0DATA3_NAME, GPIO3A_GPIO3A7);
+ gpio_request(RK30_PIN3_PA7, "mmc0-data3");
+ gpio_direction_output(RK30_PIN3_PA7,GPIO_HIGH);//set mmc0-data3 to high.
+ #endif
+ }
+ break;
+ }
+}
+
+static void rk29_sdmmc_set_iomux_mmc1(unsigned int bus_width)
+{
+#if defined(CONFIG_ARCH_RK30)
+ rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_SMMC1_CMD);
+ rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_SDMMC1_CLKOUT);
+ rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_SDMMC1_DATA0);
+ rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_SDMMC1_DATA1);
+ rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_SDMMC1_DATA2);
+ rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_SDMMC1_DATA3);
+#elif defined(CONFIG_ARCH_RK31)
+ rk30_mux_api_set(GPIO3C0_SDMMC1CMD_RMIITXEN_NAME, GPIO3C_SDMMC1CMD);
+ rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME, GPIO3C_SDMMC1CLKOUT);
+ rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_RMIITXD1_NAME, GPIO3C_SDMMC1DATA0);
+ rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_RMIITXD0_NAME, GPIO3C_SDMMC1DATA1);
+ rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_RMIIRXD0_NAME, GPIO3C_SDMMC1DATA2);
+ rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_RMIIRXD1_NAME, GPIO3C_SDMMC1DATA3);
+#endif
+}
+
+static void rk29_sdmmc_set_iomux_mmc2(unsigned int bus_width)
+{
+ ;//
+}
+
+static void rk29_sdmmc_set_iomux(int device_id, unsigned int bus_width)
+{
+ switch(device_id)
+ {
+ case 0:
+ #ifdef CONFIG_SDMMC0_RK29
+ rk29_sdmmc_set_iomux_mmc0(bus_width);
+ #endif
+ break;
+ case 1:
+ #ifdef CONFIG_SDMMC1_RK29
+ rk29_sdmmc_set_iomux_mmc1(bus_width);
+ #endif
+ break;
+ case 2:
+ rk29_sdmmc_set_iomux_mmc2(bus_width);
+ break;
+ default:
+ break;
+ }
+}
+
+#endif
+
+
+//int rk29sdk_wifi_power_state = 0;
+//int rk29sdk_bt_power_state = 0;
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+//#define RK29SDK_WIFI_BT_GPIO_POWER_N RK30_PIN3_PD0
+//#define RK29SDK_WIFI_GPIO_RESET_N RK30_PIN3_PD0
+//#define RK29SDK_BT_GPIO_RESET_N RK30_PIN3_PD1
+#define RK30SDK_WIFI_GPIO_POWER_N RK30_PIN3_PC7
+//#define RK30SDK_BT_GPIO_POWER_N RK30_PIN3_PD1
+
+#define PREALLOC_WLAN_SEC_NUM 4
+#define PREALLOC_WLAN_BUF_NUM 160
+#define PREALLOC_WLAN_SECTION_HEADER 24
+
+#define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128)
+#define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512)
+#define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024)
+
+#define WLAN_SKB_BUF_NUM 16
+
+static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM];
+
+struct wifi_mem_prealloc {
+ void *mem_ptr;
+ unsigned long size;
+};
+
+static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = {
+ {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)},
+ {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)}
+};
+
+static void *rk29sdk_mem_prealloc(int section, unsigned long size)
+{
+ if (section == PREALLOC_WLAN_SEC_NUM)
+ return wlan_static_skb;
+
+ if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM))
+ return NULL;
+
+ if (wifi_mem_array[section].size < size)
+ return NULL;
+
+ return wifi_mem_array[section].mem_ptr;
+}
+
+static int __init rk29sdk_init_wifi_mem(void)
+{
+ int i;
+ int j;
+
+ for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) {
+ wlan_static_skb[i] = dev_alloc_skb(
+ ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192));
+
+ if (!wlan_static_skb[i])
+ goto err_skb_alloc;
+ }
+
+ for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) {
+ wifi_mem_array[i].mem_ptr =
+ kmalloc(wifi_mem_array[i].size, GFP_KERNEL);
+
+ if (!wifi_mem_array[i].mem_ptr)
+ goto err_mem_alloc;
+ }
+ return 0;
+
+err_mem_alloc:
+ pr_err("Failed to mem_alloc for WLAN\n");
+ for (j = 0 ; j < i ; j++)
+ kfree(wifi_mem_array[j].mem_ptr);
+
+ i = WLAN_SKB_BUF_NUM;
+
+err_skb_alloc:
+ pr_err("Failed to skb_alloc for WLAN\n");
+ for (j = 0 ; j < i ; j++)
+ dev_kfree_skb(wlan_static_skb[j]);
+
+ return -ENOMEM;
+}
+
+static int rk29sdk_wifi_cd = 0; /* wifi virtual 'card detect' status */
+static void (*wifi_status_cb)(int card_present, void *dev_id);
+static void *wifi_status_cb_devid;
+
+static int rk29sdk_wifi_status(struct device *dev)
+{
+ return rk29sdk_wifi_cd;
+}
+
+static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id)
+{
+ if(wifi_status_cb)
+ return -EAGAIN;
+ wifi_status_cb = callback;
+ wifi_status_cb_devid = dev_id;
+ return 0;
+}
+
+static int __init rk29sdk_wifi_bt_gpio_control_init(void)
+{
+ rk29sdk_init_wifi_mem();
+
+ rk29_mux_api_set(GPIO3D0_SDMMC1PWREN_NAME, GPIO3D_GPIO3D0);
+
+ if (gpio_request(RK30SDK_WIFI_GPIO_POWER_N, "wifi_power")) {
+ pr_info("%s: request wifi power gpio failed\n", __func__);
+ return -1;
+ }
+
+ /*if (gpio_request(RK29SDK_WIFI_GPIO_RESET_N, "wifi reset")) {
+ pr_info("%s: request wifi reset gpio failed\n", __func__);
+ gpio_free(RK30SDK_WIFI_GPIO_POWER_N);
+ return -1;
+ }
+
+ if (gpio_request(RK29SDK_BT_GPIO_RESET_N, "bt reset")) {
+ pr_info("%s: request bt reset gpio failed\n", __func__);
+ gpio_free(RK29SDK_WIFI_GPIO_RESET_N);
+ return -1;
+ }*/
+
+ gpio_direction_output(RK30SDK_WIFI_GPIO_POWER_N, GPIO_LOW);
+ //gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
+ //gpio_direction_output(RK29SDK_BT_GPIO_RESET_N, GPIO_LOW);
+
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+
+ rk29_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_GPIO3C2);
+ gpio_request(RK30_PIN3_PC2, "mmc1-data1");
+ gpio_direction_output(RK30_PIN3_PC2,GPIO_LOW);//set mmc1-data1 to low.
+
+ rk29_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_GPIO3C3);
+ gpio_request(RK30_PIN3_PC3, "mmc1-data2");
+ gpio_direction_output(RK30_PIN3_PC3,GPIO_LOW);//set mmc1-data2 to low.
+
+ rk29_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_GPIO3C4);
+ gpio_request(RK30_PIN3_PC4, "mmc1-data3");
+ gpio_direction_output(RK30_PIN3_PC4,GPIO_LOW);//set mmc1-data3 to low.
+
+ rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13
+ #endif
+ pr_info("%s: init finished\n",__func__);
+
+ return 0;
+}
+
+static int rk29sdk_wifi_power(int on)
+{
+ pr_info("%s: %d\n", __func__, on);
+ if (on){
+ gpio_set_value(RK30SDK_WIFI_GPIO_POWER_N, GPIO_HIGH);
+
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+ rk29_sdmmc_gpio_open(1, 1); //added by xbw at 2011-10-13
+ #endif
+
+ //gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_HIGH);
+ mdelay(100);
+ pr_info("wifi turn on power\n");
+ }else{
+// if (!rk29sdk_bt_power_state){
+ gpio_set_value(RK30SDK_WIFI_GPIO_POWER_N, GPIO_LOW);
+
+ #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD)
+ rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13
+ #endif
+
+ mdelay(100);
+ pr_info("wifi shut off power\n");
+// }else
+// {
+// pr_info("wifi shouldn't shut off power, bt is using it!\n");
+// }
+ //gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
+
+ }
+
+// rk29sdk_wifi_power_state = on;
+ return 0;
+}
+
+static int rk29sdk_wifi_reset_state;
+static int rk29sdk_wifi_reset(int on)
+{
+ pr_info("%s: %d\n", __func__, on);
+ //gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, on);
+ //mdelay(100);
+ rk29sdk_wifi_reset_state = on;
+ return 0;
+}
+
+int rk29sdk_wifi_set_carddetect(int val)
+{
+ pr_info("%s:%d\n", __func__, val);
+ rk29sdk_wifi_cd = val;
+ if (wifi_status_cb){
+ wifi_status_cb(val, wifi_status_cb_devid);
+ }else {
+ pr_warning("%s, nobody to notify\n", __func__);
+ }
+ return 0;
+}
+EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect);
+
+#define WIFI_HOST_WAKE RK30_PIN3_PD2
+
+static struct resource resources[] = {
+ {
+ .start = WIFI_HOST_WAKE,
+ .flags = IORESOURCE_IRQ,
+ .name = "bcmdhd_wlan_irq",
+ },
+};
+
+static struct wifi_platform_data rk29sdk_wifi_control = {
+ .set_power = rk29sdk_wifi_power,
+ .set_reset = rk29sdk_wifi_reset,
+ .set_carddetect = rk29sdk_wifi_set_carddetect,
+ .mem_prealloc = rk29sdk_mem_prealloc,
+};
+
+static struct platform_device rk29sdk_wifi_device = {
+ .name = "bcmdhd_wlan",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(resources),
+ .resource = resources,
+ .dev = {
+ .platform_data = &rk29sdk_wifi_control,
+ },
+};
+#endif
+
+
+#endif // endif --#ifdef CONFIG_SDMMC_RK29
+
diff --git a/arch/arm/mach-rk30/board-rk3066b-sdk-wm8326.c b/arch/arm/mach-rk30/board-rk3066b-sdk-wm8326.c
new file mode 100644
index 000000000000..bd79715161c0
--- /dev/null
+++ b/arch/arm/mach-rk30/board-rk3066b-sdk-wm8326.c
@@ -0,0 +1,842 @@
+#include <linux/regulator/machine.h>
+#include <linux/mfd/wm831x/pdata.h>
+#include <linux/mfd/wm831x/core.h>
+#include <linux/mfd/wm831x/gpio.h>
+#include <linux/mfd/wm831x/pmu.h>
+
+#include <mach/sram.h>
+
+#define cru_readl(offset) readl_relaxed(RK30_CRU_BASE + offset)
+#define cru_writel(v, offset) do { writel_relaxed(v, RK30_CRU_BASE + offset); dsb(); } while (0)
+
+#define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset)
+#define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
+
+#define CRU_CLKGATE5_CON_ADDR 0x00e4
+#define GRF_GPIO6L_DIR_ADDR 0x0030
+#define GRF_GPIO6L_DO_ADDR 0x0068
+#define GRF_GPIO6L_EN_ADDR 0x00a0
+#define CRU_CLKGATE5_GRFCLK_ON 0x00100000
+#define CRU_CLKGATE5_GRFCLK_OFF 0x00100010
+#define GPIO6_PB1_DIR_OUT 0x02000200
+#define GPIO6_PB1_DO_LOW 0x02000000
+#define GPIO6_PB1_DO_HIGH 0x02000200
+#define GPIO6_PB1_EN_MASK 0x02000200
+#define GPIO6_PB1_UNEN_MASK 0x02000000
+
+/* wm8326 pmu*/
+#if defined(CONFIG_GPIO_WM831X)
+static struct rk29_gpio_expander_info wm831x_gpio_settinginfo[] = {
+ {
+ .gpio_num = WM831X_P01, // tp3
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_LOW,
+ },
+ {
+ .gpio_num = WM831X_P02, //tp4
+ .pin_type = GPIO_IN,
+ },
+ {
+ .gpio_num = WM831X_P03, //tp2
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+ {
+ .gpio_num = WM831X_P04, //tp1
+ .pin_type = GPIO_IN,
+ },
+ {
+ .gpio_num = WM831X_P05, //tp1
+ .pin_type = GPIO_IN,
+ },
+ {
+ .gpio_num = WM831X_P06, //tp1
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+ {
+ .gpio_num = WM831X_P07, //tp1
+ .pin_type = GPIO_IN,
+ },
+ {
+ .gpio_num = WM831X_P08, //tp1
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+ {
+ .gpio_num = WM831X_P09, //tp1
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+ {
+ .gpio_num = WM831X_P10, //tp1
+ .pin_type = GPIO_IN,
+ },
+ {
+ .gpio_num = WM831X_P11, //tp1
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+ {
+ .gpio_num = WM831X_P12,
+ .pin_type = GPIO_OUT,
+ .pin_value = GPIO_HIGH,
+ },
+};
+#endif
+
+#if defined(CONFIG_MFD_WM831X)
+
+#define UNLOCK_SECURITY_KEY ~(0x1<<5)
+#define LOCK_SECURITY_KEY 0x00
+#define PMU_POWER_SLEEP RK30_PIN0_PA1
+static struct wm831x *Wm831x;
+
+static int wm831x_pre_init(struct wm831x *parm)
+{
+ int ret;
+ Wm831x = parm;
+// printk("%s\n", __func__);
+ gpio_request(PMU_POWER_SLEEP, "NULL");
+ gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
+
+ #ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
+ #ifdef CONFIG_BATTERY_RK30_VOL3V8
+ wm831x_set_bits(parm,WM831X_SYSVDD_CONTROL ,0xc077,0xc035); //pvdd power on dect vbat voltage
+ printk("+++The vbat is too low+++\n");
+ #endif
+ #endif
+
+ ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
+ wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);
+
+ wm831x_set_bits(parm, WM831X_RTC_CONTROL, WM831X_RTC_ALAM_ENA_MASK, 0x0400);//enable rtc alam
+ //BATT_FET_ENA = 1
+ wm831x_reg_write(parm, WM831X_SECURITY_KEY, 0x9716); // unlock security key
+ wm831x_set_bits(parm, WM831X_RESET_CONTROL, 0x1003, 0x1001);
+ ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff & UNLOCK_SECURITY_KEY; // enternal reset active in sleep
+// printk("%s:WM831X_RESET_CONTROL=0x%x\n", __func__, ret);
+ wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);
+
+ wm831x_set_bits(parm,WM831X_DC1_ON_CONFIG ,0x0300,0x0000); //set dcdc mode is FCCM
+ wm831x_set_bits(parm,WM831X_DC2_ON_CONFIG ,0x0300,0x0000);
+ wm831x_set_bits(parm,WM831X_DC3_ON_CONFIG ,0x0300,0x0000);
+ wm831x_set_bits(parm,0x4066,0x0300,0x0000);
+
+#ifndef CONFIG_MACH_RK3066_SDK
+ wm831x_set_bits(parm,WM831X_LDO10_CONTROL ,0x0040,0x0040);// set ldo10 in switch mode
+#endif
+ wm831x_set_bits(parm,WM831X_STATUS_LED_1 ,0xc300,0xc100);// set led1 on(in manual mode)
+ wm831x_set_bits(parm,WM831X_STATUS_LED_2 ,0xc300,0xc000);//set led2 off(in manual mode)
+
+ wm831x_set_bits(parm,WM831X_LDO5_SLEEP_CONTROL ,0xe000,0x2000);// set ldo5 is disable in sleep mode
+ wm831x_set_bits(parm,WM831X_LDO1_SLEEP_CONTROL ,0xe000,0x2000);// set ldo1 is disable in sleep mode
+
+ wm831x_reg_write(parm, WM831X_SECURITY_KEY, LOCK_SECURITY_KEY); // lock security key
+
+ return 0;
+}
+static int wm831x_mask_interrupt(struct wm831x *Wm831x)
+{
+ /**************************clear interrupt********************/
+ wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_1,0xffff);
+ wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_2,0xffff);
+ wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_3,0xffff);
+ wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_4,0xffff);
+ wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_5,0xffff);
+
+ wm831x_reg_write(Wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0xbedc); //mask interrupt which not used
+ return 0;
+ /*****************************************************************/
+}
+
+#ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
+static int wm831x_low_power_detection(struct wm831x *wm831x)
+{
+ #ifdef CONFIG_BATTERY_RK30_VOL3V8
+ wm831x_reg_write(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0xbe5c);
+ wm831x_set_bits(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x8000,0x0000);
+ wm831x_set_bits(wm831x,WM831X_SYSVDD_CONTROL ,0xc077,0x0035); //set pvdd low voltage is 3.1v hi voltage is 3.3v
+ #else
+ wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0x803f); //open adc
+ wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0xd03f);
+ wm831x_reg_write(wm831x,WM831X_AUXADC_SOURCE,0x0001);
+
+ wm831x_reg_write(wm831x,WM831X_COMPARATOR_CONTROL,0x0001);
+ wm831x_reg_write(wm831x,WM831X_COMPARATOR_1,0x2844); //set the low power is 3.1v
+
+ wm831x_reg_write(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x99ee);
+ wm831x_set_bits(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0x0100,0x0000);
+ if (wm831x_reg_read(wm831x,WM831X_AUXADC_DATA)< 0x1844){
+ printk("The vbat is too low.\n");
+ wm831x_device_shutdown(wm831x);
+ }
+ #endif
+ return 0;
+}
+#endif
+
+#define AVS_BASE 172
+int wm831x_post_init(struct wm831x *Wm831x)
+{
+ struct regulator *dcdc;
+ struct regulator *ldo;
+
+
+ ldo = regulator_get(NULL, "ldo6"); //vcc_33
+ regulator_set_voltage(ldo, 3300000, 3300000);
+ regulator_set_suspend_voltage(ldo, 3300000);
+ regulator_enable(ldo);
+// printk("%s set ldo6 vcc_33=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo4"); // vdd_11
+ regulator_set_voltage(ldo, 1100000, 1100000);
+ regulator_set_suspend_voltage(ldo, 1000000);
+ regulator_enable(ldo);
+// printk("%s set ldo4 vdd_11=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo5"); //vcc_25
+ regulator_set_voltage(ldo, 2500000, 2500000);
+ regulator_set_suspend_voltage(ldo, 2500000);
+ regulator_enable(ldo);
+// printk("%s set ldo5 vcc_25=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+
+ dcdc = regulator_get(NULL, "dcdc4"); // vcc_io
+#ifdef CONFIG_MACH_RK3066_SDK
+ regulator_set_voltage(dcdc, 3300000, 3300000);
+ regulator_set_suspend_voltage(dcdc, 3100000);
+#else
+ regulator_set_voltage(dcdc, 3000000, 3000000);
+ regulator_set_suspend_voltage(dcdc, 2800000);
+#endif
+ regulator_enable(dcdc);
+// printk("%s set dcdc4 vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+ udelay(100);
+
+ dcdc = regulator_get(NULL, "vdd_cpu"); // vdd_arm
+ regulator_set_voltage(dcdc, 1100000, 1100000);
+ regulator_set_suspend_voltage(dcdc, 1000000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc2 vdd_cpu(vdd_arm)=%dmV end\n", __func__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+ udelay(100);
+
+ dcdc = regulator_get(NULL, "vdd_core"); // vdd_log
+
+ /* Read avs value under logic 1.1V*/
+ regulator_set_voltage(dcdc, 1100000, 1100000);
+ avs_init_val_get(1,1100000,"wm8326 init");
+ udelay(600);
+ avs_set_scal_val(AVS_BASE);
+
+ regulator_set_voltage(dcdc, 1150000, 1150000);
+ regulator_set_suspend_voltage(dcdc, 1000000);
+ regulator_enable(dcdc);
+ printk("%s set dcdc1 vdd_core(vdd_log)=%dmV end\n", __func__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+ udelay(100);
+
+ dcdc = regulator_get(NULL, "dcdc3"); // vcc_ddr
+ regulator_set_voltage(dcdc, 1150000, 1150000);
+ regulator_set_suspend_voltage(dcdc, 1150000);
+ regulator_enable(dcdc);
+// printk("%s set dcdc3 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
+ regulator_put(dcdc);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo7"); // vcc28_cif
+ regulator_set_voltage(ldo, 2800000, 2800000);
+ regulator_set_suspend_voltage(ldo, 2800000);
+ regulator_enable(ldo);
+// printk("%s set ldo7 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo1"); // vcc18_cif
+ regulator_set_voltage(ldo, 1800000, 1800000);
+ regulator_set_suspend_voltage(ldo, 1800000);
+ regulator_enable(ldo);
+// printk("%s set ldo1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo8"); // vcca_33
+ regulator_set_voltage(ldo, 3300000, 3300000);
+ regulator_set_suspend_voltage(ldo, 3300000);
+ regulator_enable(ldo);
+// printk("%s set ldo8 vcca_33=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo2"); //vccio_wl
+ regulator_set_voltage(ldo, 1800000, 1800000);
+ regulator_set_suspend_voltage(ldo, 1800000);
+ regulator_enable(ldo);
+// printk("%s set ldo2 vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo10"); //flash io
+ regulator_set_voltage(ldo, 1800000, 1800000);
+ regulator_set_suspend_voltage(ldo, 1800000);
+ regulator_enable(ldo);
+// printk("%s set ldo10 vcca_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+#ifdef CONFIG_MACH_RK3066_SDK
+ ldo = regulator_get(NULL, "ldo3"); //vdd11_hdmi
+ regulator_set_voltage(ldo, 1100000, 1100000);
+ regulator_set_suspend_voltage(ldo, 1100000);
+#else
+ ldo = regulator_get(NULL, "ldo3"); //vdd_12
+ regulator_set_voltage(ldo, 1200000, 1200000);
+ regulator_set_suspend_voltage(ldo, 1200000);
+#endif
+ regulator_enable(ldo);
+// printk("%s set ldo3 vdd_12=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ ldo = regulator_get(NULL, "ldo9"); //vcc_tp
+ regulator_set_voltage(ldo, 3300000, 3300000);
+ regulator_set_suspend_voltage(ldo, 3300000);
+ regulator_enable(ldo);
+// printk("%s set ldo9 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
+ regulator_put(ldo);
+ udelay(100);
+
+ wm831x_mask_interrupt(Wm831x);
+
+ #ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
+ wm831x_low_power_detection(Wm831x);
+ #endif
+
+ printk("wm831x_post_init end");
+ return 0;
+}
+
+static int wm831x_last_deinit(struct wm831x *Wm831x)
+{
+ struct regulator *ldo;
+
+ printk("%s\n", __func__);
+ ldo = regulator_get(NULL, "ldo1");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo2");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo3");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo4");
+ //regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo5");
+// regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo6");
+// regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo7");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo8");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo9");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ ldo = regulator_get(NULL, "ldo10");
+ regulator_disable(ldo);
+ regulator_put(ldo);
+
+ return 0;
+}
+
+struct wm831x_status_pdata wm831x_status_platdata[WM831X_MAX_STATUS] = {
+ {
+ .default_src = WM831X_STATUS_OTP,
+ .name = "wm831x_status0",
+ .default_trigger = "wm831x_otp",
+ },
+ {
+ .default_src = WM831X_STATUS_POWER,
+ .name = "wm831x_status1",
+ .default_trigger = "wm831x_power",
+ },
+};
+
+static struct regulator_consumer_supply dcdc1_consumers[] = {
+ {
+ .supply = "vdd_core",
+ }
+};
+
+static struct regulator_consumer_supply dcdc2_consumers[] = {
+ {
+ .supply = "vdd_cpu",
+ }
+
+};
+
+static struct regulator_consumer_supply dcdc3_consumers[] = {
+ {
+ .supply = "dcdc3",
+ }
+};
+
+static struct regulator_consumer_supply dcdc4_consumers[] = {
+ {
+ .supply = "dcdc4",
+ }
+};
+
+#if 0
+static struct regulator_consumer_supply epe1_consumers[] = {
+ {
+ .supply = "epe1",
+ }
+};
+
+static struct regulator_consumer_supply epe2_consumers[] = {
+ {
+ .supply = "epe2",
+ }
+};
+#endif
+
+static struct regulator_consumer_supply ldo1_consumers[] = {
+ {
+ .supply = "ldo1",
+ }
+};
+
+static struct regulator_consumer_supply ldo2_consumers[] = {
+ {
+ .supply = "ldo2",
+ }
+};
+
+static struct regulator_consumer_supply ldo3_consumers[] = {
+ {
+ .supply = "ldo3",
+ }
+};
+
+static struct regulator_consumer_supply ldo4_consumers[] = {
+ {
+ .supply = "ldo4",
+ }
+};
+
+static struct regulator_consumer_supply ldo5_consumers[] = {
+ {
+ .supply = "ldo5",
+ }
+};
+
+static struct regulator_consumer_supply ldo6_consumers[] = {
+ {
+ .supply = "ldo6",
+ }
+};
+
+static struct regulator_consumer_supply ldo7_consumers[] = {
+ {
+ .supply = "ldo7",
+ }
+};
+
+static struct regulator_consumer_supply ldo8_consumers[] = {
+ {
+ .supply = "ldo8",
+ }
+};
+
+static struct regulator_consumer_supply ldo9_consumers[] = {
+ {
+ .supply = "ldo9",
+ }
+};
+
+static struct regulator_consumer_supply ldo10_consumers[] = {
+ {
+ .supply = "ldo10",
+ }
+};
+
+static struct regulator_consumer_supply ldo11_consumers[] = {
+ {
+ .supply = "ldo11",
+ }
+};
+
+struct regulator_init_data wm831x_regulator_init_dcdc[WM831X_MAX_DCDC] = {
+ {
+ .constraints = {
+ .name = "DCDC1",
+ .min_uV = 600000,
+ .max_uV = 1800000, //0.6-1.8V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc1_consumers),
+ .consumer_supplies = dcdc1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC2",
+ .min_uV = 600000,
+ .max_uV = 1800000, //0.6-1.8V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc2_consumers),
+ .consumer_supplies = dcdc2_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC3",
+ .min_uV = 850000,
+ .max_uV = 3400000, //0.85-3.4V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc3_consumers),
+ .consumer_supplies = dcdc3_consumers,
+ },
+ {
+ .constraints = {
+ .name = "DCDC4",
+ .min_uV = 850000,
+ .max_uV = 3400000, //0.85-3.4V
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(dcdc4_consumers),
+ .consumer_supplies = dcdc4_consumers,
+ },
+};
+
+#if 0
+struct regulator_init_data wm831x_regulator_init_epe[WM831X_MAX_EPE] = {
+ {
+ .constraints = {
+ .name = "EPE1",
+ .min_uV = 1200000,
+ .max_uV = 3000000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(epe1_consumers),
+ .consumer_supplies = epe1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "EPE2",
+ .min_uV = 1200000,
+ .max_uV = 3000000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(epe2_consumers),
+ .consumer_supplies = epe2_consumers,
+ },
+};
+#endif
+
+struct regulator_init_data wm831x_regulator_init_ldo[WM831X_MAX_LDO] = {
+ {
+ .constraints = {
+ .name = "LDO1",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo1_consumers),
+ .consumer_supplies = ldo1_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO2",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
+ .consumer_supplies = ldo2_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO3",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers),
+ .consumer_supplies = ldo3_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO4",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo4_consumers),
+ .consumer_supplies = ldo4_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO5",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers),
+ .consumer_supplies = ldo5_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO6",
+ .min_uV = 900000,
+ .max_uV = 3300000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo6_consumers),
+ .consumer_supplies = ldo6_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO7",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo7_consumers),
+ .consumer_supplies = ldo7_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO8",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo8_consumers),
+ .consumer_supplies = ldo8_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO9",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo9_consumers),
+ .consumer_supplies = ldo9_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO10",
+ .min_uV = 1000000,
+ .max_uV = 3500000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo10_consumers),
+ .consumer_supplies = ldo10_consumers,
+ },
+ {
+ .constraints = {
+ .name = "LDO11",
+ .min_uV = 800000,
+ .max_uV = 1550000,
+ .apply_uV = true,
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
+ },
+ .num_consumer_supplies = ARRAY_SIZE(ldo11_consumers),
+ .consumer_supplies = ldo11_consumers,
+ },
+};
+
+static int wm831x_init_pin_type(struct wm831x *wm831x)
+{
+ struct wm831x_pdata *pdata;
+ struct rk29_gpio_expander_info *wm831x_gpio_settinginfo;
+ uint16_t wm831x_settingpin_num;
+ int i;
+
+ if (!wm831x || !wm831x->dev)
+ goto out;
+
+ pdata = wm831x->dev->platform_data;
+ if (!pdata)
+ goto out;
+
+ wm831x_gpio_settinginfo = pdata->settinginfo;
+ if (!wm831x_gpio_settinginfo)
+ goto out;
+
+ wm831x_settingpin_num = pdata->settinginfolen;
+ for (i = 0; i < wm831x_settingpin_num; i++) {
+ if (wm831x_gpio_settinginfo[i].pin_type == GPIO_IN) {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_DIR_MASK | WM831X_GPN_TRI_MASK,
+ 1 << WM831X_GPN_DIR_SHIFT | 1 << WM831X_GPN_TRI_SHIFT);
+ if (i == 1) {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_POL_MASK,
+ 0x0400);
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_FN_MASK,
+ 0x0003);
+ } // set gpio2 sleep/wakeup
+
+ if (i == 9) {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_PULL_MASK,
+ 0x0000); //disable pullup/down
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_PWR_DOM_MASK,
+ 0x0800);
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_ENA_MASK,
+ 0x0000);
+ } //set gpio10 as adc input
+
+ } else {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_DIR_MASK | WM831X_GPN_TRI_MASK,
+ 1 << WM831X_GPN_TRI_SHIFT);
+ if (wm831x_gpio_settinginfo[i].pin_value == GPIO_HIGH) {
+ wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << i, 1 << i);
+ } else {
+ wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << i, 0 << i);
+ }
+ if (i == 2) {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_PWR_DOM_MASK | WM831X_GPN_POL_MASK |WM831X_GPN_FN_MASK,
+ 1 << WM831X_GPN_POL_SHIFT | 1 << WM831X_GPN_PWR_DOM_SHIFT | 1 << 0);
+
+ } // set gpio3 as clkout output 32.768K
+
+ }
+ }
+
+#if 0
+ for (i = 0; i < pdata->gpio_pin_num; i++) {
+ wm831x_set_bits(wm831x,
+ WM831X_GPIO1_CONTROL + i,
+ WM831X_GPN_PULL_MASK | WM831X_GPN_POL_MASK | WM831X_GPN_OD_MASK | WM831X_GPN_TRI_MASK,
+ 1 << WM831X_GPN_POL_SHIFT | 1 << WM831X_GPN_TRI_SHIFT);
+
+ ret = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i);
+ printk("Gpio%d Pin Configuration = %x\n", i, ret);
+ }
+#endif
+
+out:
+ return 0;
+}
+
+void __sramfunc board_pmu_suspend(void)
+{
+ cru_writel(CRU_CLKGATE5_GRFCLK_ON,CRU_CLKGATE5_CON_ADDR); //open grf clk
+ grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
+ grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
+ grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
+}
+void __sramfunc board_pmu_resume(void)
+{
+ grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
+ grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output high
+ grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
+#ifdef CONFIG_CLK_SWITCH_TO_32K
+ sram_32k_udelay(10000);
+#else
+ sram_udelay(10000);
+#endif
+}
+static struct wm831x_pdata wm831x_platdata = {
+
+ /** Called before subdevices are set up */
+ .pre_init = wm831x_pre_init,
+ /** Called after subdevices are set up */
+ .post_init = wm831x_post_init,
+ /** Called before subdevices are power down */
+ .last_deinit = wm831x_last_deinit,
+
+#if defined(CONFIG_GPIO_WM831X)
+ .gpio_base = WM831X_GPIO_EXPANDER_BASE,
+ .gpio_pin_num = WM831X_TOTOL_GPIO_NUM,
+ .settinginfo = wm831x_gpio_settinginfo,
+ .settinginfolen = ARRAY_SIZE(wm831x_gpio_settinginfo),
+ .pin_type_init = wm831x_init_pin_type,
+ .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
+#endif
+
+ /** LED1 = 0 and so on */
+ .status = { &wm831x_status_platdata[0], &wm831x_status_platdata[1] },
+
+ /** DCDC1 = 0 and so on */
+ .dcdc = {
+ &wm831x_regulator_init_dcdc[0],
+ &wm831x_regulator_init_dcdc[1],
+ &wm831x_regulator_init_dcdc[2],
+ &wm831x_regulator_init_dcdc[3],
+ },
+
+ /** EPE1 = 0 and so on */
+ //.epe = { &wm831x_regulator_init_epe[0], &wm831x_regulator_init_epe[1] },
+
+ /** LDO1 = 0 and so on */
+ .ldo = {
+ &wm831x_regulator_init_ldo[0],
+ &wm831x_regulator_init_ldo[1],
+ &wm831x_regulator_init_ldo[2],
+ &wm831x_regulator_init_ldo[3],
+ &wm831x_regulator_init_ldo[4],
+ &wm831x_regulator_init_ldo[5],
+ &wm831x_regulator_init_ldo[6],
+ &wm831x_regulator_init_ldo[7],
+ &wm831x_regulator_init_ldo[8],
+ &wm831x_regulator_init_ldo[9],
+ &wm831x_regulator_init_ldo[10],
+ },
+};
+#endif
diff --git a/arch/arm/mach-rk30/board-rk3066b-sdk.c b/arch/arm/mach-rk30/board-rk3066b-sdk.c
new file mode 100644
index 000000000000..97f86c821884
--- /dev/null
+++ b/arch/arm/mach-rk30/board-rk3066b-sdk.c
@@ -0,0 +1,1688 @@
+/* arch/arm/mach-rk30/board-rk30-sdk.c
+ *
+ * Copyright (C) 2012 ROCKCHIP, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/input.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/skbuff.h>
+#include <linux/spi/spi.h>
+#include <linux/mmc/host.h>
+#include <linux/ion.h>
+#include <linux/cpufreq.h>
+#include <linux/clk.h>
+#include <mach/dvfs.h>
+
+#include <asm/setup.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/flash.h>
+#include <asm/hardware/gic.h>
+
+#include <mach/board.h>
+#include <mach/hardware.h>
+#include <mach/io.h>
+#include <mach/gpio.h>
+#include <mach/iomux.h>
+#include <linux/fb.h>
+#include <linux/regulator/machine.h>
+#include <linux/rfkill-rk.h>
+#include <linux/sensor-dev.h>
+#if defined(CONFIG_HDMI_RK30)
+ #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h"
+#endif
+
+#if defined(CONFIG_SPIM_RK29)
+#include "../../../drivers/spi/rk29_spim.h"
+#endif
+#if defined(CONFIG_MU509)
+#include <linux/mu509.h>
+#endif
+#if defined(CONFIG_MW100)
+#include <linux/mw100.h>
+#endif
+#if defined(CONFIG_MT6229)
+#include <linux/mt6229.h>
+#endif
+#if defined(CONFIG_ANDROID_TIMED_GPIO)
+#include "../../../drivers/staging/android/timed_gpio.h"
+#endif
+
+#ifdef CONFIG_THREE_FB_BUFFER
+#define RK30_FB0_MEM_SIZE 12*SZ_1M
+#else
+#define RK30_FB0_MEM_SIZE 8*SZ_1M
+#endif
+
+#ifdef CONFIG_VIDEO_RK29
+/*---------------- Camera Sensor Macro Define Begin ------------------------*/
+/*---------------- Camera Sensor Configuration Macro Begin ------------------------*/
+#define CONFIG_SENSOR_0 RK29_CAM_SENSOR_OV5642 /* back camera sensor */
+#define CONFIG_SENSOR_IIC_ADDR_0 0
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_0 4
+#define CONFIG_SENSOR_ORIENTATION_0 90
+#define CONFIG_SENSOR_POWER_PIN_0 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_0 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_0 RK30_PIN1_PD6
+#define CONFIG_SENSOR_FALSH_PIN_0 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_0 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_0 30000
+
+#define CONFIG_SENSOR_01 RK29_CAM_SENSOR_OV5642 /* back camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_01 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_01 4
+#define CONFIG_SENSOR_ORIENTATION_01 90
+#define CONFIG_SENSOR_POWER_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_01 RK30_PIN1_PD6
+#define CONFIG_SENSOR_FALSH_PIN_01 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_01 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_01 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_01 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_01 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_01 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_01 30000
+
+#define CONFIG_SENSOR_02 RK29_CAM_SENSOR_OV5640 /* back camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_02 0x00
+#define CONFIG_SENSOR_CIF_INDEX_02 0
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_02 4
+#define CONFIG_SENSOR_ORIENTATION_02 90
+#define CONFIG_SENSOR_POWER_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_FALSH_PIN_02 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_02 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_02 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_02 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_02 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_02 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_02 30000
+
+#define CONFIG_SENSOR_1 RK29_CAM_SENSOR_OV2659 /* front camera sensor 0 */
+#define CONFIG_SENSOR_IIC_ADDR_1 0x60
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_1 3
+#define CONFIG_SENSOR_ORIENTATION_1 270
+#define CONFIG_SENSOR_POWER_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_1 RK30_PIN2_PC7
+#define CONFIG_SENSOR_FALSH_PIN_1 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_1 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_1 30000
+
+#define CONFIG_SENSOR_11 RK29_CAM_SENSOR_OV2659 /* front camera sensor 1 */
+#define CONFIG_SENSOR_IIC_ADDR_11 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_11 3
+#define CONFIG_SENSOR_ORIENTATION_11 270
+#define CONFIG_SENSOR_POWER_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_11 INVALID_GPIO//RK30_PIN1_PB7
+#define CONFIG_SENSOR_FALSH_PIN_11 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_11 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_11 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_11 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_11 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_11 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_11 30000
+
+#define CONFIG_SENSOR_12 RK29_CAM_SENSOR_OV2659//RK29_CAM_SENSOR_OV2655 /* front camera sensor 2 */
+#define CONFIG_SENSOR_IIC_ADDR_12 0x00
+#define CONFIG_SENSOR_IIC_ADAPTER_ID_12 3
+#define CONFIG_SENSOR_ORIENTATION_12 270
+#define CONFIG_SENSOR_POWER_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_RESET_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERDN_PIN_12 INVALID_GPIO//RK30_PIN1_PB7
+#define CONFIG_SENSOR_FALSH_PIN_12 INVALID_GPIO
+#define CONFIG_SENSOR_POWERACTIVE_LEVEL_12 RK29_CAM_POWERACTIVE_L
+#define CONFIG_SENSOR_RESETACTIVE_LEVEL_12 RK29_CAM_RESETACTIVE_L
+#define CONFIG_SENSOR_POWERDNACTIVE_LEVEL_12 RK29_CAM_POWERDNACTIVE_H
+#define CONFIG_SENSOR_FLASHACTIVE_LEVEL_12 RK29_CAM_FLASHACTIVE_L
+
+#define CONFIG_SENSOR_QCIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_240X160_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_QVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_CIF_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_VGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_480P_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_SVGA_FPS_FIXED_12 15000
+#define CONFIG_SENSOR_720P_FPS_FIXED_12 30000
+
+
+#endif //#ifdef CONFIG_VIDEO_RK29
+/*---------------- Camera Sensor Configuration Macro End------------------------*/
+#include "../../../drivers/media/video/rk30_camera.c"
+/*---------------- Camera Sensor Macro Define End ---------*/
+
+#define PMEM_CAM_SIZE PMEM_CAM_NECESSARY
+/*****************************************************************************************
+ * camera devices
+ * author: ddl@rock-chips.com
+ *****************************************************************************************/
+#ifdef CONFIG_VIDEO_RK29
+#define CONFIG_SENSOR_POWER_IOCTL_USR 1 //define this refer to your board layout
+#define CONFIG_SENSOR_RESET_IOCTL_USR 0
+#define CONFIG_SENSOR_POWERDOWN_IOCTL_USR 0
+#define CONFIG_SENSOR_FLASH_IOCTL_USR 0
+
+static void rk_cif_power(int on)
+{
+ struct regulator *ldo_18,*ldo_28;
+ ldo_28 = regulator_get(NULL, "ldo7"); // vcc28_cif
+ ldo_18 = regulator_get(NULL, "ldo1"); // vcc18_cif
+ if (ldo_28 == NULL || IS_ERR(ldo_28) || ldo_18 == NULL || IS_ERR(ldo_18)){
+ printk("get cif ldo failed!\n");
+ return;
+ }
+ if(on == 0){
+ regulator_disable(ldo_28);
+ regulator_put(ldo_28);
+ regulator_disable(ldo_18);
+ regulator_put(ldo_18);
+ mdelay(500);
+ }
+ else{
+ regulator_set_voltage(ldo_28, 2800000, 2800000);
+ regulator_enable(ldo_28);
+ // printk("%s set ldo7 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_28));
+ regulator_put(ldo_28);
+
+ regulator_set_voltage(ldo_18, 1800000, 1800000);
+ // regulator_set_suspend_voltage(ldo, 1800000);
+ regulator_enable(ldo_18);
+ // printk("%s set ldo1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo_18));
+ regulator_put(ldo_18);
+ }
+}
+
+#if CONFIG_SENSOR_POWER_IOCTL_USR
+static int sensor_power_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ //#error "CONFIG_SENSOR_POWER_IOCTL_USR is 1, sensor_power_usr_cb function must be writed!!";
+ rk_cif_power(on);
+}
+#endif
+
+#if CONFIG_SENSOR_RESET_IOCTL_USR
+static int sensor_reset_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ #error "CONFIG_SENSOR_RESET_IOCTL_USR is 1, sensor_reset_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+static int sensor_powerdown_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ #error "CONFIG_SENSOR_POWERDOWN_IOCTL_USR is 1, sensor_powerdown_usr_cb function must be writed!!";
+}
+#endif
+
+#if CONFIG_SENSOR_FLASH_IOCTL_USR
+static int sensor_flash_usr_cb (struct rk29camera_gpio_res *res,int on)
+{
+ #error "CONFIG_SENSOR_FLASH_IOCTL_USR is 1, sensor_flash_usr_cb function must be writed!!";
+}
+#endif
+
+static struct rk29camera_platform_ioctl_cb sensor_ioctl_cb = {
+ #if CONFIG_SENSOR_POWER_IOCTL_USR
+ .sensor_power_cb = sensor_power_usr_cb,
+ #else
+ .sensor_power_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_RESET_IOCTL_USR
+ .sensor_reset_cb = sensor_reset_usr_cb,
+ #else
+ .sensor_reset_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_POWERDOWN_IOCTL_USR
+ .sensor_powerdown_cb = sensor_powerdown_usr_cb,
+ #else
+ .sensor_powerdown_cb = NULL,
+ #endif
+
+ #if CONFIG_SENSOR_FLASH_IOCTL_USR
+ .sensor_flash_cb = sensor_flash_usr_cb,
+ #else
+ .sensor_flash_cb = NULL,
+ #endif
+};
+
+#if CONFIG_SENSOR_IIC_ADDR_0
+static struct reginfo_t rk_init_data_sensor_reg_0[] =
+{
+ {0x0000, 0x00,0,0}
+ };
+static struct reginfo_t rk_init_data_sensor_winseqreg_0[] ={
+ {0x0000, 0x00,0,0}
+ };
+#endif
+
+#if CONFIG_SENSOR_IIC_ADDR_1
+static struct reginfo_t rk_init_data_sensor_reg_1[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_1[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_01
+static struct reginfo_t rk_init_data_sensor_reg_01[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_01[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_02
+static struct reginfo_t rk_init_data_sensor_reg_02[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_02[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_11
+static struct reginfo_t rk_init_data_sensor_reg_11[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_11[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+#if CONFIG_SENSOR_IIC_ADDR_12
+static struct reginfo_t rk_init_data_sensor_reg_12[] =
+{
+ {0x0000, 0x00,0,0}
+};
+static struct reginfo_t rk_init_data_sensor_winseqreg_12[] =
+{
+ {0x0000, 0x00,0,0}
+};
+#endif
+static rk_sensor_user_init_data_s rk_init_data_sensor[RK_CAM_NUM] =
+{
+ #if CONFIG_SENSOR_IIC_ADDR_0
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_0,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_0,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_0) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_0) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_1
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_1,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_1,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_1) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_1) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_01
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_01,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_01,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_01) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_01) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_02
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_02,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_02,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_02) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_02) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_11
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_11,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_11,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_11) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_11) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+ #if CONFIG_SENSOR_IIC_ADDR_12
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = rk_init_data_sensor_reg_12,
+ .rk_sensor_init_winseq = rk_init_data_sensor_winseqreg_12,
+ .rk_sensor_winseq_size = sizeof(rk_init_data_sensor_winseqreg_12) / sizeof(struct reginfo_t),
+ .rk_sensor_init_data_size = sizeof(rk_init_data_sensor_reg_12) / sizeof(struct reginfo_t),
+ },
+ #else
+ {
+ .rk_sensor_init_width = INVALID_VALUE,
+ .rk_sensor_init_height = INVALID_VALUE,
+ .rk_sensor_init_bus_param = INVALID_VALUE,
+ .rk_sensor_init_pixelcode = INVALID_VALUE,
+ .rk_sensor_init_data = NULL,
+ .rk_sensor_init_winseq = NULL,
+ .rk_sensor_winseq_size = 0,
+ .rk_sensor_init_data_size = 0,
+ },
+ #endif
+
+ };
+#include "../../../drivers/media/video/rk30_camera.c"
+
+#endif /* CONFIG_VIDEO_RK29 */
+
+#if defined(CONFIG_TOUCHSCREEN_GT8XX)
+#define TOUCH_RESET_PIN RK30_PIN2_PC0
+#define TOUCH_PWR_PIN INVALID_GPIO
+int goodix_init_platform_hw(void)
+{
+ int ret;
+
+ rk30_mux_api_set(GPIO4D0_SMCDATA8_TRACEDATA8_NAME, GPIO4D_GPIO4D0);
+ rk30_mux_api_set(GPIO4C2_SMCDATA2_TRACEDATA2_NAME, GPIO4C_GPIO4C2);
+ printk("%s:0x%x,0x%x\n",__func__,rk30_mux_api_get(GPIO4D0_SMCDATA8_TRACEDATA8_NAME),rk30_mux_api_get(GPIO4C2_SMCDATA2_TRACEDATA2_NAME));
+
+ if (TOUCH_PWR_PIN != INVALID_GPIO) {
+ ret = gpio_request(TOUCH_PWR_PIN, "goodix power pin");
+ if (ret != 0) {
+ gpio_free(TOUCH_PWR_PIN);
+ printk("goodix power error\n");
+ return -EIO;
+ }
+ gpio_direction_output(TOUCH_PWR_PIN, 0);
+ gpio_set_value(TOUCH_PWR_PIN, GPIO_LOW);
+ msleep(100);
+ }
+
+ if (TOUCH_RESET_PIN != INVALID_GPIO) {
+ ret = gpio_request(TOUCH_RESET_PIN, "goodix reset pin");
+ if (ret != 0) {
+ gpio_free(TOUCH_RESET_PIN);
+ printk("goodix gpio_request error\n");
+ return -EIO;
+ }
+ gpio_direction_output(TOUCH_RESET_PIN, 1);
+ msleep(100);
+ //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW);
+ //msleep(100);
+ //gpio_set_value(TOUCH_RESET_PIN, GPIO_HIGH);
+ //msleep(500);
+ }
+ return 0;
+}
+
+struct goodix_platform_data goodix_info = {
+ .model = 8105,
+ .irq_pin = RK30_PIN0_PD4,
+ .rest_pin = TOUCH_RESET_PIN,
+ .init_platform_hw = goodix_init_platform_hw,
+};
+#endif
+
+static struct spi_board_info board_spi_devices[] = {
+};
+
+/***********************************************************
+* rk30 backlight
+************************************************************/
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+#define PWM_ID 0
+#define PWM_MUX_NAME GPIO3D3_PWM0_NAME
+#define PWM_MUX_MODE GPIO3D_PWM0
+#define PWM_MUX_MODE_GPIO GPIO3D_GPIO3D4
+#define PWM_GPIO RK30_PIN3_PD4
+#define PWM_EFFECT_VALUE 1
+
+#define LCD_DISP_ON_PIN
+
+#ifdef LCD_DISP_ON_PIN
+#define BL_EN_PIN RK30_PIN0_PA1
+#define BL_EN_VALUE GPIO_HIGH
+#endif
+static int rk29_backlight_io_init(void)
+{
+ int ret = 0;
+ rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
+#ifdef LCD_DISP_ON_PIN
+ // rk30_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
+
+ ret = gpio_request(BL_EN_PIN, NULL);
+ if (ret != 0) {
+ gpio_free(BL_EN_PIN);
+ }
+
+ gpio_direction_output(BL_EN_PIN, 0);
+ gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+#endif
+ return ret;
+}
+
+static int rk29_backlight_io_deinit(void)
+{
+ int ret = 0;
+#ifdef LCD_DISP_ON_PIN
+ gpio_free(BL_EN_PIN);
+#endif
+ rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
+ return ret;
+}
+
+static int rk29_backlight_pwm_suspend(void)
+{
+ int ret = 0;
+ rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
+ if (gpio_request(PWM_GPIO, NULL)) {
+ printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__);
+ return -1;
+ }
+ gpio_direction_output(PWM_GPIO, GPIO_LOW);
+#ifdef LCD_DISP_ON_PIN
+ gpio_direction_output(BL_EN_PIN, 0);
+ gpio_set_value(BL_EN_PIN, !BL_EN_VALUE);
+#endif
+ return ret;
+}
+
+static int rk29_backlight_pwm_resume(void)
+{
+ gpio_free(PWM_GPIO);
+ rk30_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
+#ifdef LCD_DISP_ON_PIN
+ msleep(30);
+ gpio_direction_output(BL_EN_PIN, 1);
+ gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
+#endif
+ return 0;
+}
+
+static struct rk29_bl_info rk29_bl_info = {
+ .pwm_id = PWM_ID,
+ .bl_ref = PWM_EFFECT_VALUE,
+ .io_init = rk29_backlight_io_init,
+ .io_deinit = rk29_backlight_io_deinit,
+ .pwm_suspend = rk29_backlight_pwm_suspend,
+ .pwm_resume = rk29_backlight_pwm_resume,
+};
+
+static struct platform_device rk29_device_backlight = {
+ .name = "rk29_backlight",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_bl_info,
+ }
+};
+
+#endif
+
+#ifdef CONFIG_RK29_SUPPORT_MODEM
+
+#define RK30_MODEM_POWER RK30_PIN2_PB0
+#define RK30_MODEM_POWER_IOMUX rk29_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0)
+
+static int rk30_modem_io_init(void)
+{
+ printk("%s\n", __FUNCTION__);
+ RK30_MODEM_POWER_IOMUX;
+
+ return 0;
+}
+
+static struct rk29_io_t rk30_modem_io = {
+ .io_addr = RK30_MODEM_POWER,
+ .enable = GPIO_HIGH,
+ .disable = GPIO_LOW,
+ .io_init = rk30_modem_io_init,
+};
+
+static struct platform_device rk30_device_modem = {
+ .name = "rk30_modem",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk30_modem_io,
+ }
+};
+#endif
+#if defined(CONFIG_MU509)
+static int mu509_io_init(void)
+{
+
+ rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0);
+ rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1);
+ rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7);
+ rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0);
+ return 0;
+}
+
+static int mu509_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mu509_data rk29_mu509_info = {
+ .io_init = mu509_io_init,
+ .io_deinit = mu509_io_deinit,
+ .modem_power_en = RK30_PIN2_PB0,
+ .bp_power = RK30_PIN2_PB0,
+ .bp_reset = RK30_PIN2_PD1,
+ .ap_wakeup_bp = RK30_PIN2_PB7,
+ .bp_wakeup_ap = RK30_PIN6_PA0,
+};
+struct platform_device rk29_device_mu509 = {
+ .name = "mu509",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mu509_info,
+ }
+ };
+#endif
+#if defined(CONFIG_MW100)
+static int mw100_io_init(void)
+{
+ rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0);
+ rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1);
+ rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7);
+ rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0);
+ return 0;
+}
+
+static int mw100_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mw100_data rk29_mw100_info = {
+ .io_init = mw100_io_init,
+ .io_deinit = mw100_io_deinit,
+ .modem_power_en = RK30_PIN6_PB0,
+ .bp_power = RK30_PIN2_PB0,
+ .bp_reset = RK30_PIN2_PD1,
+ .ap_wakeup_bp = RK30_PIN2_PB7,
+ .bp_wakeup_ap = RK30_PIN6_PA0,
+};
+struct platform_device rk29_device_mw100 = {
+ .name = "mw100",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mw100_info,
+ }
+ };
+#endif
+#if defined(CONFIG_MT6229)
+static int mt6229_io_init(void)
+{
+ rk30_mux_api_set(GPIO2B0_LCDC1DATA8_SMCDATA8_TRACEDATA8_NAME, GPIO2B_GPIO2B0);
+ rk30_mux_api_set(GPIO2D1_LCDC1DEN_SMCWEN_NAME, GPIO2D_GPIO2D1);
+ rk30_mux_api_set(GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME, GPIO2B_GPIO2B7);
+ rk30_mux_api_set(GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME, GPIO2C_GPIO2C0);
+ return 0;
+}
+
+static int mt6229_io_deinit(void)
+{
+
+ return 0;
+}
+
+struct rk29_mt6229_data rk29_mt6229_info = {
+ .io_init = mt6229_io_init,
+ .io_deinit = mt6229_io_deinit,
+ .modem_power_en = RK30_PIN2_PB0,
+ .bp_power = RK30_PIN2_PB0,//RK30_PIN2_PB6,
+ .bp_reset = RK30_PIN2_PD1,
+ .ap_wakeup_bp = RK30_PIN2_PC0,
+ .bp_wakeup_ap = RK30_PIN6_PA0,
+};
+struct platform_device rk29_device_mt6229 = {
+ .name = "mt6229",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_mt6229_info,
+ }
+ };
+#endif
+
+/*MMA8452 gsensor*/
+#if defined (CONFIG_GS_MMA8452)
+#define MMA8452_INT_PIN RK30_PIN3_PD7
+
+static int mma8452_init_platform_hw(void)
+{
+ rk30_mux_api_set(GPIO4C0_SMCDATA0_TRACEDATA0_NAME, GPIO4C_GPIO4C0);
+
+ return 0;
+}
+
+static struct sensor_platform_data mma8452_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .init_platform_hw = mma8452_init_platform_hw,
+ .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0},
+};
+#endif
+#if defined (CONFIG_GS_LIS3DH)
+#define LIS3DH_INT_PIN RK30_PIN3_PD7
+
+static int lis3dh_init_platform_hw(void)
+{
+ rk30_mux_api_set(GPIO4C0_SMCDATA0_TRACEDATA0_NAME, GPIO4C_GPIO4C0);
+
+ return 0;
+}
+
+static struct sensor_platform_data lis3dh_info = {
+ .type = SENSOR_TYPE_ACCEL,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .init_platform_hw = lis3dh_init_platform_hw,
+ .orientation = {-1, 0, 0, 0, 0, 1, 0, -1, 0},
+};
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+static struct sensor_platform_data akm8975_info =
+{
+ .type = SENSOR_TYPE_COMPASS,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .m_layout =
+ {
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+
+ {
+ {1, 0, 0},
+ {0, 1, 0},
+ {0, 0, 1},
+ },
+ }
+};
+
+#endif
+
+#if defined(CONFIG_GYRO_L3G4200D)
+
+#include <linux/l3g4200d.h>
+#define L3G4200D_INT_PIN RK30_PIN0_PB4
+
+static int l3g4200d_init_platform_hw(void)
+{
+ rk30_mux_api_set(GPIO4C3_SMCDATA3_TRACEDATA3_NAME, GPIO4C_GPIO4C3);
+
+ return 0;
+}
+
+static struct sensor_platform_data l3g4200d_info = {
+ .type = SENSOR_TYPE_GYROSCOPE,
+ .irq_enable = 1,
+ .poll_delay_ms = 30,
+ .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1},
+ .init_platform_hw = l3g4200d_init_platform_hw,
+ .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware
+ .y_min = 40,
+ .z_min = 20,
+};
+
+#endif
+
+#ifdef CONFIG_LS_CM3217
+static struct sensor_platform_data cm3217_info = {
+ .type = SENSOR_TYPE_LIGHT,
+ .irq_enable = 0,
+ .poll_delay_ms = 500,
+};
+
+#endif
+
+#ifdef CONFIG_FB_ROCKCHIP
+
+#define LCD_CS_PIN RK30_PIN0_PB0
+#define LCD_CS_VALUE GPIO_HIGH
+
+#define LCD_EN_PIN RK30_PIN0_PB0
+#define LCD_EN_VALUE GPIO_LOW
+
+static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting)
+{
+ int ret = 0;
+ ret = gpio_request(LCD_CS_PIN, NULL);
+ if (ret != 0)
+ {
+ gpio_free(LCD_CS_PIN);
+ printk(KERN_ERR "request lcd cs pin fail!\n");
+ return -1;
+ }
+ else
+ {
+ gpio_direction_output(LCD_CS_PIN, LCD_CS_VALUE);
+ }
+ ret = gpio_request(LCD_EN_PIN, NULL);
+ if (ret != 0)
+ {
+ gpio_free(LCD_EN_PIN);
+ printk(KERN_ERR "request lcd en pin fail!\n");
+ return -1;
+ }
+ else
+ {
+ gpio_direction_output(LCD_EN_PIN, LCD_EN_VALUE);
+ }
+ return 0;
+}
+static int rk_fb_io_disable(void)
+{
+ gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE? 0:1);
+ gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE? 0:1);
+ return 0;
+}
+static int rk_fb_io_enable(void)
+{
+ gpio_set_value(LCD_CS_PIN, LCD_CS_VALUE);
+ gpio_set_value(LCD_EN_PIN, LCD_EN_VALUE);
+ return 0;
+}
+
+#if defined(CONFIG_LCDC0_RK31)
+struct rk29fb_info lcdc0_screen_info = {
+ .prop = PRMRY, //primary display device
+ .io_init = rk_fb_io_init,
+ .io_disable = rk_fb_io_disable,
+ .io_enable = rk_fb_io_enable,
+ .set_screen_info = set_lcd_info,
+};
+#endif
+
+#if defined(CONFIG_LCDC1_RK31)
+struct rk29fb_info lcdc1_screen_info = {
+ #if defined(CONFIG_HDMI_RK30)
+ .prop = EXTEND, //extend display device
+ .lcd_info = NULL,
+ .set_screen_info = hdmi_init_lcdc,
+ #endif
+};
+#endif
+
+static struct resource resource_fb[] = {
+ [0] = {
+ .name = "fb0 buf",
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "ipp buf", //for rotate
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
+ .name = "fb2 buf",
+ .start = 0,
+ .end = 0,//RK30_FB0_MEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device device_fb = {
+ .name = "rk-fb",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(resource_fb),
+ .resource = resource_fb,
+};
+#endif
+
+#ifdef CONFIG_ANDROID_TIMED_GPIO
+static struct timed_gpio timed_gpios[] = {
+ {
+ .name = "vibrator",
+ .gpio = RK30_PIN0_PA4,
+ .max_timeout = 1000,
+ .active_low = 0,
+ .adjust_time =20, //adjust for diff product
+ },
+};
+
+static struct timed_gpio_platform_data rk29_vibrator_info = {
+ .num_gpios = 1,
+ .gpios = timed_gpios,
+};
+
+static struct platform_device rk29_device_vibrator = {
+ .name = "timed-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_vibrator_info,
+ },
+
+};
+#endif
+
+#ifdef CONFIG_LEDS_GPIO_PLATFORM
+static struct gpio_led rk29_leds[] = {
+ {
+ .name = "button-backlight",
+ .gpio = RK30_PIN2_PB3,
+ .default_trigger = "timer",
+ .active_low = 0,
+ .retain_state_suspended = 0,
+ .default_state = LEDS_GPIO_DEFSTATE_OFF,
+ },
+};
+
+static struct gpio_led_platform_data rk29_leds_pdata = {
+ .leds = rk29_leds,
+ .num_leds = ARRAY_SIZE(rk29_leds),
+};
+
+static struct platform_device rk29_device_gpio_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_leds_pdata,
+ },
+};
+#endif
+
+#ifdef CONFIG_RK_IRDA
+#define IRDA_IRQ_PIN RK30_PIN0_PA3
+
+static int irda_iomux_init(void)
+{
+ int ret = 0;
+
+ //irda irq pin
+ ret = gpio_request(IRDA_IRQ_PIN, NULL);
+ if (ret != 0) {
+ gpio_free(IRDA_IRQ_PIN);
+ printk(">>>>>> IRDA_IRQ_PIN gpio_request err \n ");
+ }
+ gpio_pull_updown(IRDA_IRQ_PIN, PullDisable);
+ gpio_direction_input(IRDA_IRQ_PIN);
+
+ return 0;
+}
+
+static int irda_iomux_deinit(void)
+{
+ gpio_free(IRDA_IRQ_PIN);
+ return 0;
+}
+
+static struct irda_info rk29_irda_info = {
+ .intr_pin = IRDA_IRQ_PIN,
+ .iomux_init = irda_iomux_init,
+ .iomux_deinit = irda_iomux_deinit,
+ //.irda_pwr_ctl = bu92747guw_power_ctl,
+};
+
+static struct platform_device irda_device = {
+#ifdef CONFIG_RK_IRDA_NET
+ .name = "rk_irda",
+#else
+ .name = "bu92747_irda",
+#endif
+ .id = -1,
+ .dev = {
+ .platform_data = &rk29_irda_info,
+ }
+};
+#endif
+
+#ifdef CONFIG_ION
+#define ION_RESERVE_SIZE (80 * SZ_1M)
+static struct ion_platform_data rk30_ion_pdata = {
+ .nr = 1,
+ .heaps = {
+ {
+ .type = ION_HEAP_TYPE_CARVEOUT,
+ .id = ION_NOR_HEAP_ID,
+ .name = "norheap",
+ .size = ION_RESERVE_SIZE,
+ }
+ },
+};
+
+static struct platform_device device_ion = {
+ .name = "ion-rockchip",
+ .id = 0,
+ .dev = {
+ .platform_data = &rk30_ion_pdata,
+ },
+};
+#endif
+
+/**************************************************************************************************
+ * SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
+**************************************************************************************************/
+#ifdef CONFIG_SDMMC_RK29
+#include "board-rk3066b-sdk-sdmmc.c"
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+#define SDMMC0_WRITE_PROTECT_PIN RK30_PIN3_PB7 //According to your own project to set the value of write-protect-pin.
+#endif
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+#define SDMMC1_WRITE_PROTECT_PIN RK30_PIN3_PC7 //According to your own project to set the value of write-protect-pin.
+#endif
+
+#define RK29SDK_WIFI_SDIO_CARD_DETECT_N RK30_PIN6_PB2
+
+#endif //endif ---#ifdef CONFIG_SDMMC_RK29
+
+#ifdef CONFIG_SDMMC0_RK29
+static int rk29_sdmmc0_cfg_gpio(void)
+{
+#ifdef CONFIG_SDMMC_RK29_OLD
+ rk30_mux_api_set(GPIO3B1_SDMMC0CMD_NAME, GPIO3B_SDMMC0_CMD);
+ rk30_mux_api_set(GPIO3B0_SDMMC0CLKOUT_NAME, GPIO3B_SDMMC0_CLKOUT);
+ rk30_mux_api_set(GPIO3B2_SDMMC0DATA0_NAME, GPIO3B_SDMMC0_DATA0);
+ rk30_mux_api_set(GPIO3B3_SDMMC0DATA1_NAME, GPIO3B_SDMMC0_DATA1);
+ rk30_mux_api_set(GPIO3B4_SDMMC0DATA2_NAME, GPIO3B_SDMMC0_DATA2);
+ rk30_mux_api_set(GPIO3B5_SDMMC0DATA3_NAME, GPIO3B_SDMMC0_DATA3);
+
+ rk30_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B6);
+
+ rk30_mux_api_set(GPIO3A7_SDMMC0PWREN_NAME, GPIO3A_GPIO3A7);
+ gpio_request(RK30_PIN3_PA7, "sdmmc-power");
+ gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW);
+
+#else
+ rk29_sdmmc_set_iomux(0, 0xFFFF);
+
+ rk30_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0DETECTN);
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp");
+ gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+ return 0;
+}
+
+#define CONFIG_SDMMC0_USE_DMA
+struct rk29_sdmmc_platform_data default_sdmmc0_data = {
+ .host_ocr_avail =
+ (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+ MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+ MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36),
+ .host_caps =
+ (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+ .io_init = rk29_sdmmc0_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+ .dma_name = "sd_mmc",
+#ifdef CONFIG_SDMMC0_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+ .detect_irq = RK30_PIN3_PB6, // INVALID_GPIO
+ .enable_sd_wakeup = 0,
+
+#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC0_WRITE_PROTECT_PIN,
+#else
+ .write_prt = INVALID_GPIO,
+#endif
+};
+#endif // CONFIG_SDMMC0_RK29
+
+#ifdef CONFIG_SDMMC1_RK29
+#define CONFIG_SDMMC1_USE_DMA
+static int rk29_sdmmc1_cfg_gpio(void)
+{
+#if defined(CONFIG_SDMMC_RK29_OLD)
+ rk30_mux_api_set(GPIO3C0_SMMC1CMD_NAME, GPIO3C_SMMC1_CMD);
+ rk30_mux_api_set(GPIO3C5_SDMMC1CLKOUT_NAME, GPIO3C_SDMMC1_CLKOUT);
+ rk30_mux_api_set(GPIO3C1_SDMMC1DATA0_NAME, GPIO3C_SDMMC1_DATA0);
+ rk30_mux_api_set(GPIO3C2_SDMMC1DATA1_NAME, GPIO3C_SDMMC1_DATA1);
+ rk30_mux_api_set(GPIO3C3_SDMMC1DATA2_NAME, GPIO3C_SDMMC1_DATA2);
+ rk30_mux_api_set(GPIO3C4_SDMMC1DATA3_NAME, GPIO3C_SDMMC1_DATA3);
+ //rk30_mux_api_set(GPIO3C6_SDMMC1DETECTN_NAME, GPIO3C_SDMMC1_DETECT_N);
+
+#else
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp");
+ gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN);
+#endif
+
+#endif
+
+ return 0;
+}
+
+struct rk29_sdmmc_platform_data default_sdmmc1_data = {
+ .host_ocr_avail =
+ (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 |
+ MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 |
+ MMC_VDD_33_34),
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+ .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ |
+ MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#else
+ .host_caps =
+ (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
+#endif
+
+ .io_init = rk29_sdmmc1_cfg_gpio,
+
+#if !defined(CONFIG_SDMMC_RK29_OLD)
+ .set_iomux = rk29_sdmmc_set_iomux,
+#endif
+
+ .dma_name = "sdio",
+#ifdef CONFIG_SDMMC1_USE_DMA
+ .use_dma = 1,
+#else
+ .use_dma = 0,
+#endif
+
+#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD)
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ .status = rk29sdk_wifi_status,
+ .register_status_notify = rk29sdk_wifi_status_register,
+#endif
+#if 0
+ .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
+#endif
+
+#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT)
+ .write_prt = SDMMC1_WRITE_PROTECT_PIN,
+#else
+ .write_prt = INVALID_GPIO,
+#endif
+
+#else
+ .detect_irq = INVALID_GPIO,
+ .enable_sd_wakeup = 0,
+#endif
+
+};
+#endif //endif--#ifdef CONFIG_SDMMC1_RK29
+
+/**************************************************************************************************
+ * the end of setting for SDMMC devices
+**************************************************************************************************/
+
+#ifdef CONFIG_BATTERY_RK30_ADC
+static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = {
+ .dc_det_pin = RK30_PIN0_PB2,
+ .batt_low_pin = RK30_PIN0_PB1,
+ .charge_set_pin = INVALID_GPIO,
+ .charge_ok_pin = RK30_PIN0_PA6,
+ .dc_det_level = GPIO_LOW,
+ .charge_ok_level = GPIO_HIGH,
+};
+
+static struct platform_device rk30_device_adc_battery = {
+ .name = "rk30-battery",
+ .id = -1,
+ .dev = {
+ .platform_data = &rk30_adc_battery_platdata,
+ },
+};
+#endif
+
+#ifdef CONFIG_RK29_VMAC
+#define PHY_PWR_EN_GPIO RK30_PIN1_PD6
+#include "board-rk30-sdk-vmac.c"
+#endif
+
+#ifdef CONFIG_RFKILL_RK
+// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c
+static struct rfkill_rk_platform_data rfkill_rk_platdata = {
+ .type = RFKILL_TYPE_BLUETOOTH,
+
+ .poweron_gpio = { // BT_REG_ON
+ .io = RK30_PIN3_PC6,
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = GPIO3C6_SDMMC1DETECTN_RMIIRXERR_NAME,
+ .fgpio = GPIO3C_GPIO3C6,
+ },
+ },
+
+ .reset_gpio = { // BT_RST
+ .io = RK30_PIN3_PD0, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = GPIO3D0_SDMMC1PWREN_MIIMD_NAME,
+ .fgpio = GPIO3D_GPIO3D0,
+ },
+ },
+
+ .wake_gpio = { // BT_WAKE, use to control bt's sleep and wakeup
+ .io = RK30_PIN3_PC5, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_HIGH,
+ .iomux = {
+ .name = GPIO3C5_SDMMC1CLKOUT_RMIICLKOUT_RMIICLKIN_NAME,
+ .fgpio = GPIO3C_GPIO3C5,
+ },
+ },
+
+ .wake_host_irq = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep
+ .gpio = {
+ .io = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW, // set GPIO_LOW for falling, set 0 for rising
+ .iomux = {
+ .name = NULL,
+ },
+ },
+ },
+
+ .rts_gpio = { // UART_RTS, enable or disable BT's data coming
+ .io = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it
+ .enable = GPIO_LOW,
+ .iomux = {
+ .name = GPIO1A3_UART0RTSN_NAME,
+ .fgpio = GPIO1A_GPIO1A3,
+ .fmux = GPIO1A_UART0RTSN,
+ },
+ },
+};
+
+static struct platform_device device_rfkill_rk = {
+ .name = "rfkill_rk",
+ .id = -1,
+ .dev = {
+ .platform_data = &rfkill_rk_platdata,
+ },
+};
+#endif
+
+static struct platform_device *devices[] __initdata = {
+#ifdef CONFIG_BACKLIGHT_RK29_BL
+ &rk29_device_backlight,
+#endif
+#ifdef CONFIG_FB_ROCKCHIP
+ &device_fb,
+#endif
+#ifdef CONFIG_ION
+ &device_ion,
+#endif
+#ifdef CONFIG_ANDROID_TIMED_GPIO
+ &rk29_device_vibrator,
+#endif
+#ifdef CONFIG_LEDS_GPIO_PLATFORM
+ &rk29_device_gpio_leds,
+#endif
+#ifdef CONFIG_RK_IRDA
+ &irda_device,
+#endif
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ &rk29sdk_wifi_device,
+#endif
+#ifdef CONFIG_RK29_SUPPORT_MODEM
+ &rk30_device_modem,
+#endif
+#if defined(CONFIG_MU509)
+ &rk29_device_mu509,
+#endif
+#if defined(CONFIG_MW100)
+ &rk29_device_mw100,
+#endif
+#if defined(CONFIG_MT6229)
+ &rk29_device_mt6229,
+#endif
+#ifdef CONFIG_BATTERY_RK30_ADC
+ &rk30_device_adc_battery,
+#endif
+#ifdef CONFIG_RFKILL_RK
+ &device_rfkill_rk,
+#endif
+};
+
+// i2c
+#ifdef CONFIG_I2C0_RK30
+static struct i2c_board_info __initdata i2c0_info[] = {
+#if defined (CONFIG_GS_MMA8452)
+ {
+ .type = "gs_mma8452",
+ .addr = 0x1d,
+ .flags = 0,
+ .irq = MMA8452_INT_PIN,
+ .platform_data = &mma8452_info,
+ },
+#endif
+#if defined (CONFIG_GS_LIS3DH)
+ {
+ .type = "gs_lis3dh",
+ .addr = 0x19, //0x19(SA0-->VCC), 0x18(SA0-->GND)
+ .flags = 0,
+ .irq = LIS3DH_INT_PIN,
+ .platform_data = &lis3dh_info,
+ },
+#endif
+#if defined (CONFIG_COMPASS_AK8975)
+ {
+ .type = "ak8975",
+ .addr = 0x0d,
+ .flags = 0,
+ .irq = RK30_PIN0_PD5,
+ .platform_data = &akm8975_info,
+ },
+#endif
+#if defined (CONFIG_GYRO_L3G4200D)
+ {
+ .type = "l3g4200d_gryo",
+ .addr = 0x69,
+ .flags = 0,
+ .irq = L3G4200D_INT_PIN,
+ .platform_data = &l3g4200d_info,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_RK1000)
+ {
+ .type = "rk1000_i2c_codec",
+ .addr = 0x60,
+ .flags = 0,
+ },
+ {
+ .type = "rk1000_control",
+ .addr = 0x40,
+ .flags = 0,
+ },
+#endif
+#if defined (CONFIG_SND_SOC_RT5631)
+ {
+ .type = "rt5631",
+ .addr = 0x1a,
+ .flags = 0,
+ },
+#endif
+
+#ifdef CONFIG_MFD_RK610
+ {
+ .type = "rk610_ctl",
+ .addr = 0x40,
+ .flags = 0,
+ },
+#ifdef CONFIG_RK610_TVOUT
+ {
+ .type = "rk610_tvout",
+ .addr = 0x42,
+ .flags = 0,
+ },
+#endif
+#ifdef CONFIG_RK610_HDMI
+ {
+ .type = "rk610_hdmi",
+ .addr = 0x46,
+ .flags = 0,
+ .irq = RK29_PIN5_PA2,
+ },
+#endif
+#ifdef CONFIG_SND_SOC_RK610
+ {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80)
+ .type = "rk610_i2c_codec",
+ .addr = 0x60,
+ .flags = 0,
+ },
+#endif
+#endif
+
+};
+#endif
+
+#ifdef CONFIG_I2C1_RK30
+#include "board-rk3066b-sdk-wm8326.c"
+
+static struct i2c_board_info __initdata i2c1_info[] = {
+#if defined (CONFIG_MFD_WM831X_I2C)
+ {
+ .type = "wm8326",
+ .addr = 0x34,
+ .flags = 0,
+ .irq = RK30_PIN0_PB3,
+ .platform_data = &wm831x_platdata,
+ },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C2_RK30
+static struct i2c_board_info __initdata i2c2_info[] = {
+#if defined (CONFIG_TOUCHSCREEN_GT8XX)
+ {
+ .type = "Goodix-TS",
+ .addr = 0x55,
+ .flags = 0,
+ .irq = RK30_PIN0_PD4,
+ .platform_data = &goodix_info,
+ },
+#endif
+#if defined (CONFIG_LS_CM3217)
+ {
+ .type = "lightsensor",
+ .addr = 0x10,
+ .flags = 0,
+ .platform_data = &cm3217_info,
+ },
+#endif
+};
+#endif
+
+#ifdef CONFIG_I2C3_RK30
+static struct i2c_board_info __initdata i2c3_info[] = {
+};
+#endif
+
+#ifdef CONFIG_I2C4_RK30
+static struct i2c_board_info __initdata i2c4_info[] = {
+};
+#endif
+
+#ifdef CONFIG_I2C_GPIO_RK30
+#define I2C_SDA_PIN INVALID_GPIO// RK30_PIN2_PD6 //set sda_pin here
+#define I2C_SCL_PIN INVALID_GPIO//RK30_PIN2_PD7 //set scl_pin here
+static int rk30_i2c_io_init(void)
+{
+ //set iomux (gpio) here
+ //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7);
+ //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6);
+
+ return 0;
+}
+struct i2c_gpio_platform_data default_i2c_gpio_data = {
+ .sda_pin = I2C_SDA_PIN,
+ .scl_pin = I2C_SCL_PIN,
+ .udelay = 5, // clk = 500/udelay = 100Khz
+ .timeout = 100,//msecs_to_jiffies(100),
+ .bus_num = 5,
+ .io_init = rk30_i2c_io_init,
+};
+static struct i2c_board_info __initdata i2c_gpio_info[] = {
+};
+#endif
+
+static void __init rk30_i2c_register_board_info(void)
+{
+#ifdef CONFIG_I2C0_RK30
+ i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info));
+#endif
+#ifdef CONFIG_I2C1_RK30
+ i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info));
+#endif
+#ifdef CONFIG_I2C2_RK30
+ i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info));
+#endif
+#ifdef CONFIG_I2C3_RK30
+ i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info));
+#endif
+#ifdef CONFIG_I2C4_RK30
+ i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info));
+#endif
+#ifdef CONFIG_I2C_GPIO_RK30
+ i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info));
+#endif
+}
+//end of i2c
+
+#define POWER_ON_PIN RK30_PIN0_PA0 //power_hold
+static void rk30_pm_power_off(void)
+{
+ printk(KERN_ERR "rk30_pm_power_off start...\n");
+ gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
+#if defined(CONFIG_MFD_WM831X)
+ wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0
+ wm831x_device_shutdown(Wm831x);//wm8326 shutdown
+#endif
+ while (1);
+}
+
+static void __init machine_rk30_board_init(void)
+{
+ avs_init();
+ gpio_request(POWER_ON_PIN, "poweronpin");
+ gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
+
+ pm_power_off = rk30_pm_power_off;
+
+ rk30_i2c_register_board_info();
+ spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
+ platform_add_devices(devices, ARRAY_SIZE(devices));
+ board_usb_detect_init(RK30_PIN0_PA7);
+
+#ifdef CONFIG_WIFI_CONTROL_FUNC
+ rk29sdk_wifi_bt_gpio_control_init();
+#endif
+}
+
+static void __init rk30_reserve(void)
+{
+#ifdef CONFIG_ION
+ rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE);
+#endif
+#ifdef CONFIG_FB_ROCKCHIP
+ resource_fb[0].start = board_mem_reserve_add("fb0", RK30_FB0_MEM_SIZE);
+ resource_fb[0].end = resource_fb[0].start + RK30_FB0_MEM_SIZE - 1;
+ resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE);
+ resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1;
+ resource_fb[2].start = board_mem_reserve_add("fb2", RK30_FB0_MEM_SIZE);
+ resource_fb[2].end = resource_fb[2].start + RK30_FB0_MEM_SIZE - 1;
+#endif
+#ifdef CONFIG_VIDEO_RK29
+ rk30_camera_request_reserve_mem();
+#endif
+ board_mem_reserved();
+}
+
+/**
+ * dvfs_cpu_logic_table: table for arm and logic dvfs
+ * @frequency : arm frequency
+ * @cpu_volt : arm voltage depend on frequency
+ * @logic_volt : logic voltage arm requests depend on frequency
+ * comments : min arm/logic voltage
+ */
+static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
+ {.frequency = 252 * 1000, .cpu_volt = 1075 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
+ {.frequency = 504 * 1000, .cpu_volt = 1100 * 1000, .logic_volt = 1125 * 1000},//0.975V/1.000V
+ {.frequency = 816 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.000V/1.025V
+ {.frequency = 1008 * 1000, .cpu_volt = 1125 * 1000, .logic_volt = 1150 * 1000},//1.025V/1.050V
+ {.frequency = 1200 * 1000, .cpu_volt = 1175 * 1000, .logic_volt = 1200 * 1000},//1.100V/1.050V
+ {.frequency = 1272 * 1000, .cpu_volt = 1225 * 1000, .logic_volt = 1200 * 1000},//1.150V/1.100V
+ {.frequency = 1416 * 1000, .cpu_volt = 1300 * 1000, .logic_volt = 1200 * 1000},//1.225V/1.100V
+ {.frequency = 1512 * 1000, .cpu_volt = 1350 * 1000, .logic_volt = 1250 * 1000},//1.300V/1.150V
+ {.frequency = 1608 * 1000, .cpu_volt = 1425 * 1000, .logic_volt = 1300 * 1000},//1.325V/1.175V
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {
+ {.frequency = 266 * 1000, .index = 1050 * 1000},
+ {.frequency = 400 * 1000, .index = 1275 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table dvfs_ddr_table[] = {
+ {.frequency = 300 * 1000, .index = 1050 * 1000},
+ {.frequency = 400 * 1000, .index = 1125 * 1000},
+ {.frequency = CPUFREQ_TABLE_END},
+};
+
+#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
+static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
+static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
+
+void __init board_clock_init(void)
+{
+ rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
+ dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
+ dvfs_set_freq_volt_table(clk_get(NULL, "gpu"), dvfs_gpu_table);
+ dvfs_set_freq_volt_table(clk_get(NULL, "ddr"), dvfs_ddr_table);
+}
+
+MACHINE_START(RK30, "RK30board")
+ .boot_params = PLAT_PHYS_OFFSET + 0x800,
+ .fixup = rk30_fixup,
+ .reserve = &rk30_reserve,
+ .map_io = rk30_map_io,
+ .init_irq = rk30_init_irq,
+ .timer = &rk30_timer,
+ .init_machine = machine_rk30_board_init,
+MACHINE_END
diff --git a/arch/arm/mach-rk30/board-rk31-fpga.c b/arch/arm/mach-rk30/board-rk31-fpga.c
index bc4a3c22f344..0288970da293 100644
--- a/arch/arm/mach-rk30/board-rk31-fpga.c
+++ b/arch/arm/mach-rk30/board-rk31-fpga.c
@@ -754,7 +754,7 @@ static struct platform_device *devices[] __initdata = {
* SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05
**************************************************************************************************/
#ifdef CONFIG_SDMMC_RK29
-#include "board-rk30-sdk-sdmmc.c"
+#include "board-rk3066b-sdk-sdmmc.c"
#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT)
#define SDMMC0_WRITE_PROTECT_PIN RK30_PIN3_PB7 //According to your own project to set the value of write-protect-pin.
diff --git a/arch/arm/mach-rk30/clock.h b/arch/arm/mach-rk30/clock.h
index fdecd15d4975..a7f2de30c9f8 100644
--- a/arch/arm/mach-rk30/clock.h
+++ b/arch/arm/mach-rk30/clock.h
@@ -1,7 +1,7 @@
#ifndef __MACH_CLOCK_H__
#define __MACH_CLOCK_H__
-#ifndef CONFIG_ARCH_RK30
+#if (!defined(CONFIG_ARCH_RK30) && !defined(CONFIG_ARCH_RK31))
#define RK30_CLK_OFFBOARD_TEST
#endif
diff --git a/sound/soc/codecs/rk610_codec.c b/sound/soc/codecs/rk610_codec.c
index 6be43cfad000..70ce8727422b 100755
--- a/sound/soc/codecs/rk610_codec.c
+++ b/sound/soc/codecs/rk610_codec.c
@@ -44,6 +44,8 @@
#ifdef CONFIG_ARCH_RK30
#define RK610_SPK_CTRL_PIN RK30_PIN4_PC6
+#elif defined(CONFIG_ARCH_RK31)
+#define RK610_SPK_CTRL_PIN RK30_PIN2_PA0
#else
#define RK610_SPK_CTRL_PIN RK29_PIN6_PB6
#endif