From: Wu Liang feng <wulf@rock-chips.com>
Date: Thu, 28 Jul 2016 11:29:01 +0000 (+0800)
Subject: arm64: dts: rockchip: enable both of otg usb2 phys for rk3399
X-Git-Tag: firefly_0821_release~2040
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b629f7819320e6e8ab93f4fb96f6dcff156a18f5;p=firefly-linux-kernel-4.4.55.git

arm64: dts: rockchip: enable both of otg usb2 phys for rk3399

Enable both OTG1 PHY and OTG2 USB2 PHY for rk3399 board.
With this patch, we can support usb battery charger detect
and hold wake lock in OTG peripheral mode.

Change-Id: Icae1924d8a2427c297f28032588f178532acc560
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts
index bca58e9e06f6..ec6e7ab93522 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box-808-android.dts
@@ -549,6 +549,10 @@
 &u2phy0 {
 	status = "okay";
 
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy0_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
@@ -558,6 +562,10 @@
 &u2phy1 {
 	status = "okay";
 
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy1_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
index fb0c784dbb07..4bcda1415038 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-box.dtsi
@@ -719,6 +719,10 @@
 &u2phy0 {
 	status = "okay";
 
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy0_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
@@ -728,6 +732,10 @@
 &u2phy1 {
 	status = "okay";
 
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy1_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
index c4533e8bf1f9..c97260c216a5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-evb.dtsi
@@ -398,6 +398,10 @@
 &u2phy0 {
 	status = "okay";
 
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy0_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
@@ -407,6 +411,10 @@
 &u2phy1 {
 	status = "okay";
 
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy1_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
index eefd8fd5df08..3034c88400b7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-mid-818-android.dts
@@ -696,9 +696,21 @@
 	status = "okay";
 };
 
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+};
+
 &u2phy1 {
 	status = "okay";
 
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy1_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts b/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts
index 52b69b73bab4..936565e3e65e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-vr-android.dts
@@ -774,6 +774,10 @@
 &u2phy0 {
 	status = "okay";
 
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy0_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
@@ -783,6 +787,10 @@
 &u2phy1 {
 	status = "okay";
 
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
 	u2phy1_host: host-port {
 		phy-supply = <&vcc5v0_host>;
 		status = "okay";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index ee2b83effbaf..e8d3202782a0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -439,6 +439,8 @@
 			reg = <0x0 0xfe800000 0x0 0x100000>;
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
 			dr_mode = "otg";
+			phys = <&u2phy0_otg>;
+			phy-names = "usb2-phy";
 			snps,dis_enblslpm_quirk;
 			snps,phyif_utmi_16_bits;
 			snps,dis_u2_freeclk_exists_quirk;
@@ -465,6 +467,8 @@
 			reg = <0x0 0xfe900000 0x0 0x100000>;
 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
 			dr_mode = "otg";
+			phys = <&u2phy1_otg>;
+			phy-names = "usb2-phy";
 			snps,dis_enblslpm_quirk;
 			snps,phyif_utmi_16_bits;
 			snps,dis_u2_freeclk_exists_quirk;