From: Akira Hatanaka Date: Mon, 20 Aug 2012 17:53:24 +0000 (+0000) Subject: Fix coding style violations in 162135 and 162136. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=b862f094b78e3176813903f63c0e78b6e0e7852b;p=oota-llvm.git Fix coding style violations in 162135 and 162136. Patch by Petar Jovanovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162213 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp index 67166c919bb..0aea5986140 100644 --- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp +++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp @@ -307,10 +307,10 @@ void RuntimeDyldELF::resolveARMRelocation(uint8_t *LocalAddress, } void RuntimeDyldELF::resolveMIPSRelocation(uint8_t *LocalAddress, - uint32_t FinalAddress, - uint32_t Value, - uint32_t Type, - int32_t Addend) { + uint32_t FinalAddress, + uint32_t Value, + uint32_t Type, + int32_t Addend) { uint32_t* TargetPtr = (uint32_t*)LocalAddress; Value += Addend; @@ -367,8 +367,8 @@ void RuntimeDyldELF::resolveRelocation(uint8_t *LocalAddress, case Triple::mips: // Fall through. case Triple::mipsel: resolveMIPSRelocation(LocalAddress, (uint32_t)(FinalAddress & 0xffffffffL), - (uint32_t)(Value & 0xffffffffL), Type, - (uint32_t)(Addend & 0xffffffffL)); + (uint32_t)(Value & 0xffffffffL), Type, + (uint32_t)(Addend & 0xffffffffL)); break; default: llvm_unreachable("Unsupported CPU type!"); } diff --git a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h index 68633c847c1..eade49ee250 100644 --- a/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h +++ b/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h @@ -43,10 +43,10 @@ protected: int32_t Addend); void resolveMIPSRelocation(uint8_t *LocalAddress, - uint32_t FinalAddress, - uint32_t Value, - uint32_t Type, - int32_t Addend); + uint32_t FinalAddress, + uint32_t Value, + uint32_t Type, + int32_t Addend); virtual void resolveRelocation(uint8_t *LocalAddress, uint64_t FinalAddress, diff --git a/lib/Target/Mips/MipsELFWriterInfo.cpp b/lib/Target/Mips/MipsELFWriterInfo.cpp index f104b40a31b..ac3a54758eb 100644 --- a/lib/Target/Mips/MipsELFWriterInfo.cpp +++ b/lib/Target/Mips/MipsELFWriterInfo.cpp @@ -1,4 +1,4 @@ -//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend --------===// +//===-- MipsELFWriterInfo.cpp - ELF Writer Info for the Mips backend ------===// // // The LLVM Compiler Infrastructure // @@ -27,54 +27,54 @@ using namespace llvm; MipsELFWriterInfo::MipsELFWriterInfo(bool is64Bit_, bool isLittleEndian_) : TargetELFWriterInfo(is64Bit_, isLittleEndian_) { - EMachine = EM_MIPS; - } + EMachine = EM_MIPS; +} MipsELFWriterInfo::~MipsELFWriterInfo() {} unsigned MipsELFWriterInfo::getRelocationType(unsigned MachineRelTy) const { - switch(MachineRelTy) { - case Mips::reloc_mips_pc16: - return ELF::R_MIPS_GOT16; - case Mips::reloc_mips_hi: - return ELF::R_MIPS_HI16; - case Mips::reloc_mips_lo: - return ELF::R_MIPS_LO16; - case Mips::reloc_mips_26: - return ELF::R_MIPS_26; - default: - llvm_unreachable("unknown Mips machine relocation type"); - } + switch(MachineRelTy) { + case Mips::reloc_mips_pc16: + return ELF::R_MIPS_GOT16; + case Mips::reloc_mips_hi: + return ELF::R_MIPS_HI16; + case Mips::reloc_mips_lo: + return ELF::R_MIPS_LO16; + case Mips::reloc_mips_26: + return ELF::R_MIPS_26; + default: + llvm_unreachable("unknown Mips machine relocation type"); + } } long int MipsELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy, - long int Modifier) const { - switch(RelTy) { - case ELF::R_MIPS_26: return Modifier; - default: - llvm_unreachable("unknown Mips relocation type"); - } + long int Modifier) const { + switch(RelTy) { + case ELF::R_MIPS_26: return Modifier; + default: + llvm_unreachable("unknown Mips relocation type"); + } } unsigned MipsELFWriterInfo::getRelocationTySize(unsigned RelTy) const { - switch(RelTy) { - case ELF::R_MIPS_GOT16: - case ELF::R_MIPS_26: - return 32; - default: - llvm_unreachable("unknown Mips relocation type"); - } + switch(RelTy) { + case ELF::R_MIPS_GOT16: + case ELF::R_MIPS_26: + return 32; + default: + llvm_unreachable("unknown Mips relocation type"); + } } bool MipsELFWriterInfo::isPCRelativeRel(unsigned RelTy) const { - switch(RelTy) { - case ELF::R_MIPS_GOT16: - return true; - case ELF::R_MIPS_26: - return false; - default: - llvm_unreachable("unknown Mips relocation type"); - } + switch(RelTy) { + case ELF::R_MIPS_GOT16: + return true; + case ELF::R_MIPS_26: + return false; + default: + llvm_unreachable("unknown Mips relocation type"); + } } unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const { @@ -82,8 +82,8 @@ unsigned MipsELFWriterInfo::getAbsoluteLabelMachineRelTy() const { } long int MipsELFWriterInfo::computeRelocation(unsigned SymOffset, - unsigned RelOffset, - unsigned RelTy) const { + unsigned RelOffset, + unsigned RelTy) const { if (RelTy == ELF::R_MIPS_GOT16) return SymOffset - (RelOffset + 4); diff --git a/lib/Target/Mips/MipsTargetMachine.h b/lib/Target/Mips/MipsTargetMachine.h index a949ef35f1c..a542ef68209 100644 --- a/lib/Target/Mips/MipsTargetMachine.h +++ b/lib/Target/Mips/MipsTargetMachine.h @@ -72,7 +72,7 @@ public: } virtual const MipsELFWriterInfo *getELFWriterInfo() const { - return &ELFWriterInfo; + return &ELFWriterInfo; } // Pass Pipeline Configuration