From: H Hartley Sweeten Date: Fri, 1 May 2015 21:58:40 +0000 (-0700) Subject: staging: comedi: ni_stc.h: tidy up NI_M_AO_CFG_BANK_REG bits X-Git-Tag: firefly_0821_release~176^2~1545^2~746 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bae453048752599aa4acedfc3b0c1244744ec2b7;p=firefly-linux-kernel-4.4.55.git staging: comedi: ni_stc.h: tidy up NI_M_AO_CFG_BANK_REG bits Rename the CamelCase and convert the enum into defines. Use the BIT() macro to define the bits. Signed-off-by: H Hartley Sweeten Reviewed-by: Ian Abbott Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c index 0853f0e2cf2c..7f4e9d6df8fe 100644 --- a/drivers/staging/comedi/drivers/ni_mio_common.c +++ b/drivers/staging/comedi/drivers/ni_mio_common.c @@ -2650,7 +2650,7 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev, if (timed) { for (i = 0; i < s->n_chan; ++i) { - devpriv->ao_conf[i] &= ~MSeries_AO_Update_Timed_Bit; + devpriv->ao_conf[i] &= ~NI_M_AO_CFG_BANK_UPDATE_TIMED; ni_writeb(dev, devpriv->ao_conf[i], NI_M_AO_CFG_BANK_REG(i)); ni_writeb(dev, 0xf, NI_M_AO_WAVEFORM_ORDER_REG(i)); @@ -2666,20 +2666,20 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev, conf = 0; switch (krange->max - krange->min) { case 20000000: - conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits; + conf |= NI_M_AO_CFG_BANK_REF_INT_10V; ni_writeb(dev, 0, NI_M_AO_REF_ATTENUATION_REG(chan)); break; case 10000000: - conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits; + conf |= NI_M_AO_CFG_BANK_REF_INT_5V; ni_writeb(dev, 0, NI_M_AO_REF_ATTENUATION_REG(chan)); break; case 4000000: - conf |= MSeries_AO_DAC_Reference_10V_Internal_Bits; + conf |= NI_M_AO_CFG_BANK_REF_INT_10V; ni_writeb(dev, MSeries_Attenuate_x5_Bit, NI_M_AO_REF_ATTENUATION_REG(chan)); break; case 2000000: - conf |= MSeries_AO_DAC_Reference_5V_Internal_Bits; + conf |= NI_M_AO_CFG_BANK_REF_INT_5V; ni_writeb(dev, MSeries_Attenuate_x5_Bit, NI_M_AO_REF_ATTENUATION_REG(chan)); break; @@ -2690,10 +2690,10 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev, } switch (krange->max + krange->min) { case 0: - conf |= MSeries_AO_DAC_Offset_0V_Bits; + conf |= NI_M_AO_CFG_BANK_OFFSET_0V; break; case 10000000: - conf |= MSeries_AO_DAC_Offset_5V_Bits; + conf |= NI_M_AO_CFG_BANK_OFFSET_5V; break; default: dev_err(dev->class_dev, @@ -2701,7 +2701,7 @@ static int ni_m_series_ao_config_chanlist(struct comedi_device *dev, break; } if (timed) - conf |= MSeries_AO_Update_Timed_Bit; + conf |= NI_M_AO_CFG_BANK_UPDATE_TIMED; ni_writeb(dev, conf, NI_M_AO_CFG_BANK_REG(chan)); devpriv->ao_conf[chan] = conf; ni_writeb(dev, i, NI_M_AO_WAVEFORM_ORDER_REG(chan)); diff --git a/drivers/staging/comedi/drivers/ni_stc.h b/drivers/staging/comedi/drivers/ni_stc.h index 1625e1402bee..bde58031dba3 100644 --- a/drivers/staging/comedi/drivers/ni_stc.h +++ b/drivers/staging/comedi/drivers/ni_stc.h @@ -966,6 +966,16 @@ static const struct comedi_lrange range_ni_E_ao_ext; #define NI_M_DAC_DIRECT_DATA_REG(x) (0x0c0 + ((x) * 4)) #define NI_M_AO_WAVEFORM_ORDER_REG(x) (0x0c2 + ((x) * 4)) #define NI_M_AO_CFG_BANK_REG(x) (0x0c3 + ((x) * 4)) +#define NI_M_AO_CFG_BANK_BIPOLAR BIT(7) +#define NI_M_AO_CFG_BANK_UPDATE_TIMED BIT(6) +#define NI_M_AO_CFG_BANK_REF(x) (((x) & 0x7) << 3) +#define NI_M_AO_CFG_BANK_REF_MASK NI_M_AO_CFG_BANK_REF(7) +#define NI_M_AO_CFG_BANK_REF_INT_10V NI_M_AO_CFG_BANK_REF(0) +#define NI_M_AO_CFG_BANK_REF_INT_5V NI_M_AO_CFG_BANK_REF(1) +#define NI_M_AO_CFG_BANK_OFFSET(x) (((x) & 0x7) << 0) +#define NI_M_AO_CFG_BANK_OFFSET_MASK NI_M_AO_CFG_BANK_OFFSET(7) +#define NI_M_AO_CFG_BANK_OFFSET_0V NI_M_AO_CFG_BANK_OFFSET(0) +#define NI_M_AO_CFG_BANK_OFFSET_5V NI_M_AO_CFG_BANK_OFFSET(1) #define NI_M_RTSI_SHARED_MUX_REG 0x1a2 #define NI_M_CLK_FOUT2_REG 0x1c4 #define NI_M_CLK_FOUT2_RTSI_10MHZ BIT(7) @@ -1028,17 +1038,6 @@ static const struct comedi_lrange range_ni_E_ao_ext; #define NI_M_STATIC_AI_CTRL_REG(x) ((x) ? (0x260 + (x)) : 0x064) #define NI_M_AO_REF_ATTENUATION_REG(x) (0x264 + (x)) -enum MSeries_AO_Config_Bank_Bits { - MSeries_AO_DAC_Offset_Select_Mask = 0x7, - MSeries_AO_DAC_Offset_0V_Bits = 0x0, - MSeries_AO_DAC_Offset_5V_Bits = 0x1, - MSeries_AO_DAC_Reference_Mask = 0x38, - MSeries_AO_DAC_Reference_10V_Internal_Bits = 0x0, - MSeries_AO_DAC_Reference_5V_Internal_Bits = 0x8, - MSeries_AO_Update_Timed_Bit = 0x40, - MSeries_AO_Bipolar_Bit = 0x80 /* turns on 2's complement encoding */ -}; - enum MSeries_AO_Reference_Attenuation_Bits { MSeries_Attenuate_x5_Bit = 0x1 };