From: Matt Arsenault Date: Wed, 15 Oct 2014 23:37:42 +0000 (+0000) Subject: Move variable down to use X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bb402de0c99925f90ac99aa9caa359d44a2d8313;p=oota-llvm.git Move variable down to use git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219867 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index fa384db230b..b7df3d8341d 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -2160,10 +2160,6 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, WidthVal); } - APInt Demanded = APInt::getBitsSet(32, - OffsetVal, - OffsetVal + WidthVal); - if ((OffsetVal + WidthVal) >= 32) { SDValue ShiftVal = DAG.getConstant(OffsetVal, MVT::i32); return DAG.getNode(Signed ? ISD::SRA : ISD::SRL, DL, MVT::i32, @@ -2171,6 +2167,10 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, } if (BitsFrom.hasOneUse()) { + APInt Demanded = APInt::getBitsSet(32, + OffsetVal, + OffsetVal + WidthVal); + APInt KnownZero, KnownOne; TargetLowering::TargetLoweringOpt TLO(DAG, !DCI.isBeforeLegalize(), !DCI.isBeforeLegalizeOps());