From: Chris Lattner Date: Thu, 7 Jan 2010 21:59:23 +0000 (+0000) Subject: Fix rdar://7517201, a regression introduced by r92849. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bd1fccfad59f24267b6fa8b898711d63a3574c7d;p=oota-llvm.git Fix rdar://7517201, a regression introduced by r92849. When folding a and(any_ext(load)) both the any_ext and the load have to have only a single use. This removes the anyext-uses.ll testcase which started failing because it is unreduced and unclear what it is testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92950 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f6fc04ccef4..8a561eb0e5e 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1895,7 +1895,7 @@ SDValue DAGCombiner::visitAND(SDNode *N) { ? cast(N0.getOperand(0)) : cast(N0); if (LN0->getExtensionType() != ISD::SEXTLOAD && - LN0->isUnindexed() && N0.hasOneUse()) { + LN0->isUnindexed() && N0.hasOneUse() && LN0->hasOneUse()) { uint32_t ActiveBits = N1C->getAPIntValue().getActiveBits(); if (ActiveBits > 0 && APIntOps::isMask(ActiveBits, N1C->getAPIntValue())){ EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); diff --git a/test/CodeGen/X86/anyext-uses.ll b/test/CodeGen/X86/anyext-uses.ll deleted file mode 100644 index 0cf169eb28d..00000000000 --- a/test/CodeGen/X86/anyext-uses.ll +++ /dev/null @@ -1,47 +0,0 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: grep mov %t | count 8 -; RUN: not grep implicit %t - -; Avoid partial register updates; don't define an i8 register and read -; the i32 super-register. - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-apple-darwin9.6" - %struct.RC4_KEY = type { i8, i8, [256 x i8] } - -define void @foo(%struct.RC4_KEY* nocapture %key, i64 %len, i8* %indata, i8* %outdata) nounwind { -entry: - br label %bb24 - -bb24: ; preds = %bb24, %entry - %0 = load i8* null, align 1 ; [#uses=1] - %1 = zext i8 %0 to i64 ; [#uses=1] - %2 = shl i64 %1, 32 ; [#uses=1] - %3 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 0 ; [#uses=1] - %4 = load i8* %3, align 1 ; [#uses=2] - %5 = add i8 %4, 0 ; [#uses=2] - %6 = zext i8 %5 to i64 ; [#uses=0] - %7 = load i8* null, align 1 ; [#uses=1] - %8 = zext i8 %4 to i32 ; [#uses=1] - %9 = zext i8 %7 to i32 ; [#uses=1] - %10 = add i32 %9, %8 ; [#uses=1] - %11 = and i32 %10, 255 ; [#uses=1] - %12 = zext i32 %11 to i64 ; [#uses=1] - %13 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 %12 ; [#uses=1] - %14 = load i8* %13, align 1 ; [#uses=1] - %15 = zext i8 %14 to i64 ; [#uses=1] - %16 = shl i64 %15, 48 ; [#uses=1] - %17 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 0 ; [#uses=1] - %18 = load i8* %17, align 1 ; [#uses=2] - %19 = add i8 %18, %5 ; [#uses=1] - %20 = zext i8 %19 to i64 ; [#uses=1] - %21 = getelementptr %struct.RC4_KEY* %key, i64 0, i32 2, i64 %20 ; [#uses=1] - store i8 %18, i8* %21, align 1 - %22 = or i64 0, %2 ; [#uses=1] - %23 = or i64 %22, 0 ; [#uses=1] - %24 = or i64 %23, %16 ; [#uses=1] - %25 = or i64 %24, 0 ; [#uses=1] - %26 = xor i64 %25, 0 ; [#uses=1] - store i64 %26, i64* null, align 8 - br label %bb24 -} diff --git a/test/CodeGen/X86/fold-load.ll b/test/CodeGen/X86/fold-load.ll index eb182da1012..5525af25270 100644 --- a/test/CodeGen/X86/fold-load.ll +++ b/test/CodeGen/X86/fold-load.ll @@ -1,11 +1,12 @@ -; RUN: llc < %s -march=x86 +; RUN: llc < %s -march=x86 | FileCheck %s %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] } %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (...)*, void (...)*, i8*, i8 } @stmt_obstack = external global %struct.obstack ; <%struct.obstack*> [#uses=1] -define void @expand_start_bindings() { +; This should just not crash. +define void @test1() nounwind { entry: - br i1 false, label %cond_true, label %cond_next + br i1 true, label %cond_true, label %cond_next cond_true: ; preds = %entry %new_size.0.i = select i1 false, i32 0, i32 0 ; [#uses=1] @@ -25,3 +26,22 @@ cond_false30.i: ; preds = %cond_true cond_next: ; preds = %entry ret void } + + + +define i32 @test2(i16* %P, i16* %Q) nounwind { + %A = load i16* %P, align 4 ; [#uses=11] + %C = zext i16 %A to i32 ; [#uses=1] + %D = and i32 %C, 255 ; [#uses=1] + br label %L +L: + + store i16 %A, i16* %Q + ret i32 %D + +; CHECK: test2: +; CHECK: movl 4(%esp), %eax +; CHECK-NEXT: movzwl (%eax), %ecx + +} +