From: JF Bastien <jfb@google.com>
Date: Tue, 18 Jun 2013 23:07:16 +0000 (+0000)
Subject: Small correction to unordered memory code generation of ARM LDRD
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bd4bd3686d5e623514cc7564227a6fa45254c610;p=oota-llvm.git

Small correction to unordered memory code generation of ARM LDRD

The information was correct pre-LPAE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184253 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/docs/Atomics.rst b/docs/Atomics.rst
index 705d73fbaba..1243f345483 100644
--- a/docs/Atomics.rst
+++ b/docs/Atomics.rst
@@ -211,7 +211,7 @@ Notes for code generation
   never stored.  A normal load or store instruction is usually sufficient, but
   note that an unordered load or store cannot be split into multiple
   instructions (or an instruction which does multiple memory operations, like
-  ``LDRD`` on ARM).
+  ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM).
 
 Monotonic
 ---------