From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Thu, 11 Dec 2014 23:37:32 +0000 (+0000)
Subject: R600/SI: Don't verify constant bus usage of flag ops
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bdf0ee0d1d9ba1c4d0db4eefae0aea01d4ed87bd;p=oota-llvm.git

R600/SI: Don't verify constant bus usage of flag ops

This was checking if pseudo-operands like the source
modifiers were using the constant bus, which happens to work
because the values these all can be happen to be valid inline
immediates.

This fixes a later commit which starts checking the register class
of the operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224078 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIInstrInfo.cpp b/lib/Target/R600/SIInstrInfo.cpp
index 42f10f21f98..4aa5ac889c3 100644
--- a/lib/Target/R600/SIInstrInfo.cpp
+++ b/lib/Target/R600/SIInstrInfo.cpp
@@ -1107,10 +1107,18 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr *MI,
 
   // Verify VOP*
   if (isVOP1(Opcode) || isVOP2(Opcode) || isVOP3(Opcode) || isVOPC(Opcode)) {
+    // Only look at the true operands. Only a real operand can use the constant
+    // bus, and we don't want to check pseudo-operands like the source modifier
+    // flags.
+    const int OpIndices[] = { Src0Idx, Src1Idx, Src2Idx };
+
     unsigned ConstantBusCount = 0;
     unsigned SGPRUsed = AMDGPU::NoRegister;
-    for (int i = 0, e = MI->getNumOperands(); i != e; ++i) {
-      const MachineOperand &MO = MI->getOperand(i);
+    for (int OpIdx : OpIndices) {
+      if (OpIdx == -1)
+        break;
+
+      const MachineOperand &MO = MI->getOperand(OpIdx);
       if (usesConstantBus(MRI, MO)) {
         if (MO.isReg()) {
           if (MO.getReg() != SGPRUsed)