From: Matthias Braun Date: Thu, 14 May 2015 18:01:13 +0000 (+0000) Subject: TargetSchedule: factor out common code; NFC X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=be4ab8dafe2e1122c14eae7db1223b2180ca899a;p=oota-llvm.git TargetSchedule: factor out common code; NFC git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237376 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/TargetSchedule.h b/include/llvm/CodeGen/TargetSchedule.h index b6136665b96..751fac411ce 100644 --- a/include/llvm/CodeGen/TargetSchedule.h +++ b/include/llvm/CodeGen/TargetSchedule.h @@ -40,6 +40,9 @@ class TargetSchedModel { SmallVector ResourceFactors; unsigned MicroOpFactor; // Multiply to normalize microops to resource units. unsigned ResourceLCM; // Resource units per cycle. Latency normalization factor. + + unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const; + public: TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {} diff --git a/lib/CodeGen/TargetSchedule.cpp b/lib/CodeGen/TargetSchedule.cpp index ef2dab1287f..c3fdd73b055 100644 --- a/lib/CodeGen/TargetSchedule.cpp +++ b/lib/CodeGen/TargetSchedule.cpp @@ -224,6 +224,19 @@ unsigned TargetSchedModel::computeOperandLatency( return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, DefMI); } +unsigned +TargetSchedModel::computeInstrLatency(const MCSchedClassDesc &SCDesc) const { + unsigned Latency = 0; + for (unsigned DefIdx = 0, DefEnd = SCDesc.NumWriteLatencyEntries; + DefIdx != DefEnd; ++DefIdx) { + // Lookup the definition's write latency in SubtargetInfo. + const MCWriteLatencyEntry *WLEntry = + STI->getWriteLatencyEntry(&SCDesc, DefIdx); + Latency = std::max(Latency, capLatency(WLEntry->Cycles)); + } + return Latency; +} + unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { assert(hasInstrSchedModel() && "Only call this function with a SchedModel"); @@ -231,16 +244,8 @@ unsigned TargetSchedModel::computeInstrLatency(unsigned Opcode) const { const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SCIdx); unsigned Latency = 0; - if (SCDesc->isValid() && !SCDesc->isVariant()) { - for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; - DefIdx != DefEnd; ++DefIdx) { - // Lookup the definition's write latency in SubtargetInfo. - const MCWriteLatencyEntry *WLEntry = - STI->getWriteLatencyEntry(SCDesc, DefIdx); - Latency = std::max(Latency, capLatency(WLEntry->Cycles)); - } - return Latency; - } + if (SCDesc->isValid() && !SCDesc->isVariant()) + return computeInstrLatency(*SCDesc); assert(Latency && "No MI sched latency"); return 0; @@ -257,17 +262,8 @@ TargetSchedModel::computeInstrLatency(const MachineInstr *MI, if (hasInstrSchedModel()) { const MCSchedClassDesc *SCDesc = resolveSchedClass(MI); - if (SCDesc->isValid()) { - unsigned Latency = 0; - for (unsigned DefIdx = 0, DefEnd = SCDesc->NumWriteLatencyEntries; - DefIdx != DefEnd; ++DefIdx) { - // Lookup the definition's write latency in SubtargetInfo. - const MCWriteLatencyEntry *WLEntry = - STI->getWriteLatencyEntry(SCDesc, DefIdx); - Latency = std::max(Latency, capLatency(WLEntry->Cycles)); - } - return Latency; - } + if (SCDesc->isValid()) + return computeInstrLatency(*SCDesc); } return TII->defaultDefLatency(SchedModel, MI); }