From: Andrew Lenharth <andrewl@lenharth.org>
Date: Sun, 24 Sep 2006 19:45:58 +0000 (+0000)
Subject: Add support for other relocation bases to jump tables, as well as custom asm directives
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=beec30eaf301bd6882cd06800b5175b94f033f9d;p=oota-llvm.git

Add support for other relocation bases to jump tables, as well as custom asm directives


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30593 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index b830dc3d845..99fd5917b7a 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -82,6 +82,9 @@ namespace ISD {
     Constant, ConstantFP,
     GlobalAddress, FrameIndex, JumpTable, ConstantPool, ExternalSymbol,
 
+    // The relocation value to add to the value loaded from a jump table
+    JumpTableRelocBase,
+
     // TargetConstant* - Like Constant*, but the DAG does not do any folding or
     // simplification of the constant.
     TargetConstant,
diff --git a/include/llvm/Target/TargetAsmInfo.h b/include/llvm/Target/TargetAsmInfo.h
index 6f63ba3a31a..d3941ad61d2 100644
--- a/include/llvm/Target/TargetAsmInfo.h
+++ b/include/llvm/Target/TargetAsmInfo.h
@@ -108,6 +108,7 @@ namespace llvm {
     const char *Data16bitsDirective;      // Defaults to "\t.short\t"
     const char *Data32bitsDirective;      // Defaults to "\t.long\t"
     const char *Data64bitsDirective;      // Defaults to "\t.quad\t"
+    const char *JumpTableDirective;       // if used, the jump table reloc flag
 
     //===--- Alignment Information ----------------------------------------===//
 
@@ -323,6 +324,9 @@ namespace llvm {
     const char *getData64bitsDirective() const {
       return Data64bitsDirective;
     }
+    const char *getJumpTableDirective() const {
+      return JumpTableDirective;
+    }
     const char *getAlignDirective() const {
       return AlignDirective;
     }
diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp
index f6b4bfcbfe3..bcdb393c239 100644
--- a/lib/CodeGen/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter.cpp
@@ -187,7 +187,10 @@ void AsmPrinter::EmitJumpTableInfo(MachineJumpTableInfo *MJTI) {
   // JTEntryDirective is a string to print sizeof(ptr) for non-PIC jump tables,
   // and 32 bits for PIC since PIC jump table entries are differences, not
   // pointers to blocks.
-  const char *JTEntryDirective = TAI->getData32bitsDirective();
+  // Use the architecture specific relocation directive, if it is set
+  const char *JTEntryDirective = TAI->getJumpTableDirective();
+  if (!JTEntryDirective)
+    JTEntryDirective = TAI->getData32bitsDirective();
   
   // Pick the directive to use to print the jump table entries, and switch to 
   // the appropriate section.
@@ -227,8 +230,10 @@ void AsmPrinter::EmitJumpTableInfo(MachineJumpTableInfo *MJTI) {
           << '_' << i << "_set_" << JTBBs[ii]->getNumber();
       } else if (TM.getRelocationModel() == Reloc::PIC_) {
         printBasicBlockLabel(JTBBs[ii], false, false);
-        O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
-          << getFunctionNumber() << '_' << i;
+	//If the arch uses custom Jump Table directives, don't calc relative to JT
+	if (!TAI->getJumpTableDirective()) 
+	  O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
+	    << getFunctionNumber() << '_' << i;
       } else {
         printBasicBlockLabel(JTBBs[ii], false, false);
       }
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index cb8588c0318..9507e4be844 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -558,6 +558,17 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
 #endif
     assert(0 && "Do not know how to legalize this operator!");
     abort();
+  case ISD::JumpTableRelocBase:
+    switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
+    case TargetLowering::Custom:
+      Tmp1 = TLI.LowerOperation(Op, DAG);
+      if (Tmp1.Val) Result = Tmp1;
+      break;
+    default:
+      Result = LegalizeOp(Node->getOperand(0));
+      break;
+    }
+    break;
   case ISD::GlobalAddress:
   case ISD::ExternalSymbol:
   case ISD::ConstantPool:
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index cf26eb29512..27a45a1d522 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -868,8 +868,9 @@ void SelectionDAGLowering::visitJumpTable(SelectionDAGISel::JumpTable &JT) {
   SDOperand LD  = DAG.getLoad(isPIC ? MVT::i32 : PTy, Copy.getValue(1), ADD,
                               DAG.getSrcValue(0));
   if (isPIC) {
+    SDOperand Reloc = DAG.getNode(ISD::JumpTableRelocBase, PTy, TAB);
     ADD = DAG.getNode(ISD::ADD, PTy,
-        ((PTy != MVT::i32) ? DAG.getNode(ISD::SIGN_EXTEND, PTy, LD) : LD), TAB);
+        ((PTy != MVT::i32) ? DAG.getNode(ISD::SIGN_EXTEND, PTy, LD) : LD), Reloc);
     DAG.setRoot(DAG.getNode(ISD::BRIND, MVT::Other, LD.getValue(1), ADD));
   } else {
     DAG.setRoot(DAG.getNode(ISD::BRIND, MVT::Other, LD.getValue(1), LD));
diff --git a/lib/Target/TargetAsmInfo.cpp b/lib/Target/TargetAsmInfo.cpp
index e5fc26ecb05..6efcf4be245 100644
--- a/lib/Target/TargetAsmInfo.cpp
+++ b/lib/Target/TargetAsmInfo.cpp
@@ -47,6 +47,7 @@ TargetAsmInfo::TargetAsmInfo() :
   ConstantPoolSection("\t.section .rodata\n"),
   JumpTableDataSection("\t.section .rodata\n"),
   JumpTableTextSection("\t.text\n"),
+  JumpTableDirective(0),
   StaticCtorsSection("\t.section .ctors,\"aw\",@progbits"),
   StaticDtorsSection("\t.section .dtors,\"aw\",@progbits"),
   FourByteConstantSection(0),