From: Jim Grosbach Date: Fri, 30 Mar 2012 21:54:22 +0000 (+0000) Subject: ARM fix encoding fixup resolution for ldrd and friends. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bf3c322640fdaf6e4a60a59ed8cb108a7f6685ad;p=oota-llvm.git ARM fix encoding fixup resolution for ldrd and friends. The 8-bit payload is not contiguous in the opcode. Move the upper nibble over 4 bits into the correct place. rdar://11158641 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153780 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index 3ba891da4f7..5f2138d5de9 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -469,7 +469,9 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { Value = -Value; isAdd = false; } + // The value has the low 4 bits encoded in [3:0] and the high 4 in [11:8]. assert ((Value < 256) && "Out of range pc-relative fixup value!"); + Value = (Value & 0xf) | ((Value & 0xf0) << 4); return Value | (isAdd << 23); } case ARM::fixup_arm_pcrel_10: