From: Ben Dooks <ben.dooks@codethink.co.uk>
Date: Wed, 25 Mar 2015 11:27:47 +0000 (+0000)
Subject: ARM: socfpga: enable big endian for secondary core(s)
X-Git-Tag: firefly_0821_release~176^2~1557^2~2^2~8
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=bf55e0a48f8ee086c71d1a9de1f0eeee7501b1c4;p=firefly-linux-kernel-4.4.55.git

ARM: socfpga: enable big endian for secondary core(s)

Update the secondary code to allow the secondary boot to work when the
system is running big endian.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/arch/arm/mach-socfpga/headsmp.S b/arch/arm/mach-socfpga/headsmp.S
index f65ea0af4af3..a580dcdec526 100644
--- a/arch/arm/mach-socfpga/headsmp.S
+++ b/arch/arm/mach-socfpga/headsmp.S
@@ -10,6 +10,7 @@
 #include <linux/linkage.h>
 #include <linux/init.h>
 #include <asm/memory.h>
+#include <asm/assembler.h>
 
 	.arch	armv7-a
 
@@ -18,12 +19,14 @@ ENTRY(secondary_trampoline)
 	 * Thus, we can just subtract the PAGE_OFFSET to get the physical
 	 * address of &cpu1start_addr. This would not work for platforms
 	 * where the physical memory does not start at 0x0.
-	 */
+	*/
+ARM_BE8(setend	be)
 	adr	r0, 1f
 	ldmia	r0, {r1, r2}
 	sub	r2, r2, #PAGE_OFFSET
 	ldr	r3, [r2]
 	ldr	r4, [r3]
+ARM_BE8(rev	r4, r4)
 	bx	r4
 
 	.align