From: Anton Korobeynikov Date: Thu, 16 Jul 2009 13:48:42 +0000 (+0000) Subject: Swap the order of imm and idx field for rri addrmode in order to make handling of... X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c4368a1507ac072a4b5da5d7dbcbf66bdfe6595f;p=oota-llvm.git Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp index 025119c7038..20814d0efdb 100644 --- a/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp +++ b/lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp @@ -208,10 +208,10 @@ void SystemZAsmPrinter::printRIAddrOperand(const MachineInstr *MI, int OpNum, void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum, const char* Modifier) { const MachineOperand &Base = MI->getOperand(OpNum); - const MachineOperand &Index = MI->getOperand(OpNum+1); + const MachineOperand &Index = MI->getOperand(OpNum+2); // Print displacement operand. - printOperand(MI, OpNum+2); + printOperand(MI, OpNum+1); // Print base operand (if any) if (Base.getReg()) { @@ -219,7 +219,7 @@ void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum, printOperand(MI, OpNum); if (Index.getReg()) { O << ','; - printOperand(MI, OpNum+1); + printOperand(MI, OpNum+2); } O << ')'; } else diff --git a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index 84081b4afca..3e1cc3c544d 100644 --- a/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -105,14 +105,14 @@ namespace { #include "SystemZGenDAGISel.inc" private: + bool SelectAddrRI(const SDValue& Op, SDValue& Addr, + SDValue &Base, SDValue &Disp); bool SelectAddrRRI(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp); + SDValue &Base, SDValue &Disp, SDValue &Index); bool SelectLAAddr(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp); + SDValue &Base, SDValue &Disp, SDValue &Index); SDNode *Select(SDValue Op); - bool SelectAddrRI(const SDValue& Op, SDValue& Addr, - SDValue &Base, SDValue &Disp); bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM, unsigned Depth = 0); bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM); @@ -368,7 +368,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N, /// Returns true if the address can be represented by a base register plus /// index register plus a signed 20-bit displacement [base + idx + imm]. bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp) { + SDValue &Base, SDValue &Disp, SDValue &Index) { SystemZRRIAddressMode AM; bool Done = false; @@ -417,7 +417,7 @@ bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr, /// SelectLAAddr - it calls SelectAddr and determines if the maximal addressing /// mode it matches can be cost effectively emitted as an LA/LAY instruction. bool SystemZDAGToDAGISel::SelectLAAddr(SDValue Op, SDValue Addr, - SDValue &Base, SDValue &Index, SDValue &Disp) { + SDValue &Base, SDValue &Disp, SDValue &Index) { SystemZRRIAddressMode AM; if (MatchAddress(Addr, AM)) diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td index 9ca4be1759b..978562e9c3e 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.td +++ b/lib/Target/SystemZ/SystemZInstrInfo.td @@ -164,12 +164,12 @@ def riaddr : Operand, def rriaddr : Operand, ComplexPattern { let PrintMethod = "printRRIAddrOperand"; - let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp); + let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index); } def laaddr : Operand, ComplexPattern { let PrintMethod = "printRRIAddrOperand"; - let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp); + let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index); }