From: Bradley Smith Date: Wed, 9 Apr 2014 14:44:49 +0000 (+0000) Subject: [ARM64] Properly support both apple and standard syntax for FMOV X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c669ad900d6a8f0c45f672828c023f857a249ba9;p=oota-llvm.git [ARM64] Properly support both apple and standard syntax for FMOV git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205896 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td index af8b6838212..378b698909e 100644 --- a/lib/Target/ARM64/ARM64InstrFormats.td +++ b/lib/Target/ARM64/ARM64InstrFormats.td @@ -3277,8 +3277,10 @@ class BaseUnscaledConversion rmode, bits<3> opcode, let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in class BaseUnscaledConversionToHigh rmode, bits<3> opcode, - RegisterClass srcType, RegisterOperand dstType, string asm> - : I<(outs dstType:$Rd), (ins srcType:$Rn), asm, "\t$Rd[1], $Rn", "", []>, + RegisterClass srcType, RegisterOperand dstType, string asm, + string kind> + : I<(outs dstType:$Rd), (ins srcType:$Rn), asm, + "{\t$Rd"#kind#"[1], $Rn|"#kind#"\t$Rd[1], $Rn}", "", []>, Sched<[WriteFCopy]> { bits<5> Rd; bits<5> Rn; @@ -3293,8 +3295,10 @@ class BaseUnscaledConversionToHigh rmode, bits<3> opcode, let mayLoad = 0, mayStore = 0, hasSideEffects = 0 in class BaseUnscaledConversionFromHigh rmode, bits<3> opcode, - RegisterOperand srcType, RegisterClass dstType, string asm> - : I<(outs dstType:$Rd), (ins srcType:$Rn), asm, "\t$Rd, $Rn[1]", "", []>, + RegisterOperand srcType, RegisterClass dstType, string asm, + string kind> + : I<(outs dstType:$Rd), (ins srcType:$Rn), asm, + "{\t$Rd, $Rn"#kind#"[1]|"#kind#"\t$Rd, $Rn[1]}", "", []>, Sched<[WriteFCopy]> { bits<5> Rd; bits<5> Rn; @@ -3331,21 +3335,16 @@ multiclass UnscaledConversion { } def XDHighr : BaseUnscaledConversionToHigh<0b01, 0b111, GPR64, V128, - asm#".d"> { + asm, ".d"> { let Inst{31} = 1; let Inst{22} = 0; } def DXHighr : BaseUnscaledConversionFromHigh<0b01, 0b110, V128, GPR64, - asm#".d"> { + asm, ".d"> { let Inst{31} = 1; let Inst{22} = 0; } - - def : InstAlias(NAME#XDHighr) V128:$Vd, GPR64:$Rn), 0>; - def : InstAlias(NAME#DXHighr) GPR64:$Rd, V128:$Vn), 0>; } //--- diff --git a/test/MC/ARM64/fp-encoding.s b/test/MC/ARM64/fp-encoding.s index a780ee38f12..7c7208f770d 100644 --- a/test/MC/ARM64/fp-encoding.s +++ b/test/MC/ARM64/fp-encoding.s @@ -1,4 +1,4 @@ -; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding < %s | FileCheck %s +; RUN: llvm-mc -triple arm64-apple-darwin -show-encoding -output-asm-variant=1 < %s | FileCheck %s foo: ;----------------------------------------------------------------------------- diff --git a/test/MC/Disassembler/ARM64/non-apple-fmov.txt b/test/MC/Disassembler/ARM64/non-apple-fmov.txt new file mode 100644 index 00000000000..e3c3a996c46 --- /dev/null +++ b/test/MC/Disassembler/ARM64/non-apple-fmov.txt @@ -0,0 +1,7 @@ +# RUN: llvm-mc -triple arm64 -disassemble < %s | FileCheck %s + +0x00 0x00 0xae 0x9e +0x00 0x00 0xaf 0x9e + +# CHECK: fmov x0, v0.d[1] +# CHECK: fmov v0.d[1], x0 diff --git a/test/MC/Disassembler/ARM64/scalar-fp.txt b/test/MC/Disassembler/ARM64/scalar-fp.txt index b242df53688..732e1c12d2e 100644 --- a/test/MC/Disassembler/ARM64/scalar-fp.txt +++ b/test/MC/Disassembler/ARM64/scalar-fp.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc -triple arm64-apple-darwin --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple arm64-apple-darwin --disassemble -output-asm-variant=1 < %s | FileCheck %s #----------------------------------------------------------------------------- # Floating-point arithmetic