From: Zheng Yang <zhengyang@rock-chips.com>
Date: Tue, 29 Sep 2015 01:25:55 +0000 (+0800)
Subject: video: rockchip: hdmi: 3288w: support HDCP2.2
X-Git-Tag: firefly_0821_release~3723
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c7eae6490c066dd0925b6c377d07f716d975c5fd;p=firefly-linux-kernel-4.4.55.git

video: rockchip: hdmi: 3288w: support HDCP2.2

Change-Id: Ie20cba47fa925b5a3cce49ec2557e47ce737459e
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit db93f1aadfa06f47a0b9041b172cfcc4028e4928)
---

diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hdcp.c b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hdcp.c
index 06856a616fca..83fc1ab5a4e5 100644
--- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hdcp.c
+++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hdcp.c
@@ -411,8 +411,11 @@ void rockchip_hdmiv2_hdcp2_enable(int enable)
 		return;
 	}
 	hdmi_dev = hdcp->hdmi->property->priv;
-	if (hdmi_dev->soctype == HDMI_SOC_RK3368 &&
-	    hdmi_dev->hdcp2_enable != enable) {
+	if ((hdmi_readl(hdmi_dev, CONFIG1_ID) & m_HDCP22) == 0) {
+		pr_err("Don't support hdcp22\n");
+		return;
+	}
+	if (hdmi_dev->hdcp2_enable != enable) {
 		hdmi_dev->hdcp2_enable = enable;
 		if (hdmi_dev->hdcp2_enable == 0) {
 			hdmi_msk_reg(hdmi_dev, HDCP2REG_CTRL,
@@ -454,7 +457,7 @@ static void rockchip_hdmiv2_hdcp_start(struct hdmi *hdmi)
 
 	if (!hdcp->enable)
 		return;
-	if (hdmi_dev->soctype == HDMI_SOC_RK3368) {
+	if (hdmi_readl(hdmi_dev, CONFIG1_ID) & m_HDCP22) {
 		if (hdmi_dev->hdcp2_enable == 0) {
 			hdmi_msk_reg(hdmi_dev, HDCP2REG_CTRL,
 				     m_HDCP2_OVR_EN | m_HDCP2_FORCE,
diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.h b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.h
index bfde5ef4fb00..607707f1dbc3 100644
--- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.h
+++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.h
@@ -81,6 +81,7 @@ enum {
 #define m_HDCP			(1 << 0)
 
 #define CONFIG1_ID			0x0005
+#define m_HDCP22		(1 << 6)
 #define m_HDMI20		(1 << 5)
 #define m_CONFAPB		(1 << 1)