From: Joey Gouly <joey.gouly@arm.com>
Date: Wed, 17 Jul 2013 14:03:49 +0000 (+0000)
Subject: Add the tests that I forgot to 'svn add' with my previous commit (r186504).
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c88ac4a344bdb5b3ade5c24d67e1227c4d3a8978;p=oota-llvm.git

Add the tests that I forgot to 'svn add' with my previous commit (r186504).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186506 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/test/CodeGen/ARM/vminmaxnm.ll b/test/CodeGen/ARM/vminmaxnm.ll
new file mode 100644
index 00000000000..afa73b9e9c0
--- /dev/null
+++ b/test/CodeGen/ARM/vminmaxnm.ll
@@ -0,0 +1,42 @@
+; RUN: llc < %s -mtriple armv8 -mattr=+neon | FileCheck %s
+
+define <4 x float> @vmaxnmq(<4 x float>* %A, <4 x float>* %B) nounwind {
+; CHECK: vmaxnmq
+; CHECK: vmaxnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
+  %tmp1 = load <4 x float>* %A
+  %tmp2 = load <4 x float>* %B
+  %tmp3 = call <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+  ret <4 x float> %tmp3
+}
+
+define <2 x float> @vmaxnmd(<2 x float>* %A, <2 x float>* %B) nounwind {
+; CHECK: vmaxnmd
+; CHECK: vmaxnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
+  %tmp1 = load <2 x float>* %A
+  %tmp2 = load <2 x float>* %B
+  %tmp3 = call <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+  ret <2 x float> %tmp3
+}
+
+define <4 x float> @vminnmq(<4 x float>* %A, <4 x float>* %B) nounwind {
+; CHECK: vminnmq
+; CHECK: vminnm.f32 q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}}
+  %tmp1 = load <4 x float>* %A
+  %tmp2 = load <4 x float>* %B
+  %tmp3 = call <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
+  ret <4 x float> %tmp3
+}
+
+define <2 x float> @vminnmd(<2 x float>* %A, <2 x float>* %B) nounwind {
+; CHECK: vminnmd
+; CHECK: vminnm.f32 d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
+  %tmp1 = load <2 x float>* %A
+  %tmp2 = load <2 x float>* %B
+  %tmp3 = call <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
+  ret <2 x float> %tmp3
+}
+
+declare <4 x float> @llvm.arm.neon.vminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
+declare <4 x float> @llvm.arm.neon.vmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone
+declare <2 x float> @llvm.arm.neon.vmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone
diff --git a/test/MC/ARM/neon-v8.s b/test/MC/ARM/neon-v8.s
new file mode 100644
index 00000000000..cc9fb3aebf3
--- /dev/null
+++ b/test/MC/ARM/neon-v8.s
@@ -0,0 +1,10 @@
+@ RUN: llvm-mc -triple armv8 -mattr=+neon -show-encoding < %s | FileCheck %s
+
+vmaxnm.f32 d4, d5, d1
+@ CHECK: vmaxnm.f32 d4, d5, d1 @ encoding: [0x11,0x4f,0x05,0xf3]
+vmaxnm.f32 q2, q4, q6
+@ CHECK: vmaxnm.f32 q2, q4, q6 @ encoding: [0x5c,0x4f,0x08,0xf3]
+vminnm.f32 d5, d4, d30
+@ CHECK: vminnm.f32 d5, d4, d30 @ encoding: [0x3e,0x5f,0x24,0xf3]
+vminnm.f32 q0, q13, q2
+@ CHECK: vminnm.f32 q0, q13, q2 @ encoding: [0xd4,0x0f,0x2a,0xf3]
diff --git a/test/MC/ARM/thumb-neon-v8.s b/test/MC/ARM/thumb-neon-v8.s
new file mode 100644
index 00000000000..eafd271e64b
--- /dev/null
+++ b/test/MC/ARM/thumb-neon-v8.s
@@ -0,0 +1,10 @@
+@ RUN: llvm-mc -triple thumbv8 -mattr=+neon -show-encoding < %s | FileCheck %s
+
+vmaxnm.f32 d4, d5, d1
+@ CHECK: vmaxnm.f32 d4, d5, d1 @ encoding: [0x05,0xff,0x11,0x4f]
+vmaxnm.f32 q2, q4, q6
+@ CHECK: vmaxnm.f32 q2, q4, q6 @ encoding: [0x08,0xff,0x5c,0x4f]
+vminnm.f32 d5, d4, d30
+@ CHECK: vminnm.f32 d5, d4, d30 @ encoding: [0x24,0xff,0x3e,0x5f]
+vminnm.f32 q0, q13, q2
+@ CHECK: vminnm.f32 q0, q13, q2 @ encoding: [0x2a,0xff,0xd4,0x0f]
diff --git a/test/MC/Disassembler/ARM/neon-v8.txt b/test/MC/Disassembler/ARM/neon-v8.txt
new file mode 100644
index 00000000000..188d475b093
--- /dev/null
+++ b/test/MC/Disassembler/ARM/neon-v8.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple armv8-unknown-unknown -mattr=+neon -disassemble < %s | FileCheck %s
+
+0x11 0x4f 0x05 0xf3
+# CHECK: vmaxnm.f32 d4, d5, d1
+0x5c 0x4f 0x08 0xf3
+# CHECK: vmaxnm.f32 q2, q4, q6
+0x3e 0x5f 0x24 0xf3
+# CHECK: vminnm.f32 d5, d4, d30
+0xd4 0x0f 0x2a 0xf3
+# CHECK: vminnm.f32 q0, q13, q2
diff --git a/test/MC/Disassembler/ARM/thumb-neon-v8.txt b/test/MC/Disassembler/ARM/thumb-neon-v8.txt
new file mode 100644
index 00000000000..c777dc6912a
--- /dev/null
+++ b/test/MC/Disassembler/ARM/thumb-neon-v8.txt
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple thumbv8-unknown-unknown -mattr=+neon -disassemble < %s | FileCheck %s
+
+0x5 0xff 0x11 0x4f
+# CHECK: vmaxnm.f32 d4, d5, d1
+0x08 0xff 0x5c 0x4f
+# CHECK: vmaxnm.f32 q2, q4, q6
+0x24 0xff 0x3e 0x5f
+# CHECK: vminnm.f32 d5, d4, d30
+0x2a 0xff 0xd4 0x0f
+# CHECK: vminnm.f32 q0, q13, q2