From: typ <typ@rock-chips.com>
Date: Mon, 8 Dec 2014 02:50:18 +0000 (+0800)
Subject: RK3126/3126B DDR:fix ddr DQS1 drv set err
X-Git-Tag: firefly_0821_release~4410
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c9303ae7853c9e7ac45a8f2380b2872a0bf0d8aa;p=firefly-linux-kernel-4.4.55.git

RK3126/3126B DDR:fix ddr DQS1 drv set err
---

diff --git a/arch/arm/mach-rockchip/ddr_rk3126b.c b/arch/arm/mach-rockchip/ddr_rk3126b.c
index e747f9baff43..5e1bc097aee9 100755
--- a/arch/arm/mach-rockchip/ddr_rk3126b.c
+++ b/arch/arm/mach-rockchip/ddr_rk3126b.c
@@ -1032,7 +1032,7 @@ static void __sramfunc ddr_set_dll_bypass(uint32 freq)
 	uint32 phase;
 	if (freq < 350) {
 		phase = 3;
-	} else if (freq < 600) {
+	} else if (freq < 666) {
 		phase = 2;
 	} else
 		phase = 1;
@@ -1521,7 +1521,7 @@ static void __sramfunc ddr_update_odt(void)
 	pPHY_Reg->PHY_REG22 = PHY_DRV_ODT_SET(PHY_RON_44ohm);	/*clk drv*/
 
 	pPHY_Reg->PHY_REG25 = PHY_DRV_ODT_SET(PHY_RON_44ohm);	/*DQS0 drv*/
-	pPHY_Reg->PHY_REG36 = PHY_DRV_ODT_SET(PHY_RON_44ohm);	/*DQS1 drv*/
+	pPHY_Reg->PHY_REG26 = PHY_DRV_ODT_SET(PHY_RON_44ohm);	/*DQS1 drv*/
 	dsb();
 }