From: Andrew Trick <atrick@apple.com>
Date: Thu, 5 Dec 2013 17:55:49 +0000 (+0000)
Subject: Fix the A9 machine model. VTRN writes two registers.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=c9fc1e7de965680b6b45ef9454ea240095ea1a87;p=oota-llvm.git

Fix the A9 machine model. VTRN writes two registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196514 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMScheduleA9.td b/lib/Target/ARM/ARMScheduleA9.td
index f34c0b0abf3..6276cfc200d 100644
--- a/lib/Target/ARM/ARMScheduleA9.td
+++ b/lib/Target/ARM/ARMScheduleA9.td
@@ -2431,7 +2431,7 @@ def :ItinRW<[A9WriteV3], [IIC_VSHLiD, IIC_VSHLiQ]>;
 def :ItinRW<[A9WriteV4], [IIC_VSHLi4D, IIC_VSHLi4Q]>;
 
 // NEON permute
-def :ItinRW<[A9WriteV2], [IIC_VPERMD, IIC_VPERMQ, IIC_VEXTD]>;
+def :ItinRW<[A9WriteV2, A9WriteV2], [IIC_VPERMD, IIC_VPERMQ, IIC_VEXTD]>;
 def :ItinRW<[A9WriteV3, A9WriteV4, ReadDefault, A9Read2],
             [IIC_VPERMQ3, IIC_VEXTQ]>;
 def :ItinRW<[A9WriteV3, A9Read2], [IIC_VTB1]>;