From: Chris Lattner Date: Tue, 30 Aug 2005 17:21:17 +0000 (+0000) Subject: Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=cc0675a4be9a5133abd48ee272ff999ae48feabf;p=oota-llvm.git Fix FreeBench/fourinarow with the dag isel, by not adding a bogus result to SHIFT_PARTS nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23151 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index db3b33abc51..758fd2de8d6 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -2388,10 +2388,7 @@ void SelectionDAGLegalize::ExpandShiftParts(unsigned NodeOp, Ops.push_back(LHSL); Ops.push_back(LHSH); Ops.push_back(Amt); - std::vector VTs; - VTs.push_back(LHSL.getValueType()); - VTs.push_back(LHSH.getValueType()); - VTs.push_back(Amt.getValueType()); + std::vector VTs(2, LHSL.getValueType()); Lo = DAG.getNode(NodeOp, VTs, Ops); Hi = Lo.getValue(1); }