From: Paulo Zanoni Date: Tue, 20 Nov 2012 15:27:37 +0000 (-0200) Subject: drm/i915: use cpu/pch transcoder on intel_enable_pipe X-Git-Tag: firefly_0821_release~3680^2~1036^2~40^2~122 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=cc391bbbddd16c36dabcb9f4a26500a2973a7108;p=firefly-linux-kernel-4.4.55.git drm/i915: use cpu/pch transcoder on intel_enable_pipe This function runs on Haswell, so set the correct pch_transcoder and cpu_transcoder variables. This fixes an assertion failure on Haswell VGA. Signed-off-by: Paulo Zanoni Reviewed-by: Damien Lespiau Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 82ab55af52fe..4e303cf7ead6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1812,9 +1812,15 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, { enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe); + enum transcoder pch_transcoder; int reg; u32 val; + if (IS_HASWELL(dev_priv->dev)) + pch_transcoder = TRANSCODER_A; + else + pch_transcoder = pipe; + /* * A pipe without a PLL won't actually be able to drive bits from * a plane. On ILK+ the pipe PLLs are integrated, so we don't @@ -1825,8 +1831,8 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, else { if (pch_port) { /* if driving the PCH, we need FDI enabled */ - assert_fdi_rx_pll_enabled(dev_priv, pipe); - assert_fdi_tx_pll_enabled(dev_priv, pipe); + assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder); + assert_fdi_tx_pll_enabled(dev_priv, cpu_transcoder); } /* FIXME: assert CPU port conditions for SNB+ */ }