From: Jakob Stoklund Olesen Date: Tue, 29 Mar 2011 17:47:02 +0000 (+0000) Subject: Remember to use the correct register when rematerializing for snippets. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=cf610d07de3ba4929bb5d00e084877dd974b44a1;p=oota-llvm.git Remember to use the correct register when rematerializing for snippets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128469 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp index f56cb4822ec..397943bf3c4 100644 --- a/lib/CodeGen/InlineSpiller.cpp +++ b/lib/CodeGen/InlineSpiller.cpp @@ -580,7 +580,7 @@ bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg, DEBUG(dbgs() << "\tadding flags: "); for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand &MO = MI->getOperand(i); - if (MO.isReg() && MO.isUse() && MO.getReg() == Edit->getReg()) + if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) MO.setIsUndef(); } DEBUG(dbgs() << UseIdx << '\t' << *MI); @@ -601,11 +601,11 @@ bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg, return false; } - // If the instruction also writes Edit->getReg(), it had better not require - // the same register for uses and defs. + // If the instruction also writes VirtReg.reg, it had better not require the + // same register for uses and defs. bool Reads, Writes; SmallVector Ops; - tie(Reads, Writes) = MI->readsWritesVirtualRegister(Edit->getReg(), &Ops); + tie(Reads, Writes) = MI->readsWritesVirtualRegister(VirtReg.reg, &Ops); if (Writes) { for (unsigned i = 0, e = Ops.size(); i != e; ++i) { MachineOperand &MO = MI->getOperand(Ops[i]); @@ -626,7 +626,7 @@ bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg, } // Alocate a new register for the remat. - LiveInterval &NewLI = Edit->create(LIS, VRM); + LiveInterval &NewLI = Edit->createFrom(VirtReg.reg, LIS, VRM); NewLI.markNotSpillable(); // Rematting for a copy: Set allocation hint to be the destination register. @@ -642,7 +642,7 @@ bool InlineSpiller::reMaterializeFor(LiveInterval &VirtReg, // Replace operands for (unsigned i = 0, e = Ops.size(); i != e; ++i) { MachineOperand &MO = MI->getOperand(Ops[i]); - if (MO.isReg() && MO.isUse() && MO.getReg() == Edit->getReg()) { + if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) { MO.setReg(NewLI.reg); MO.setIsKill(); } diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp index d1a2fafca84..94a3fc1ed0d 100644 --- a/lib/CodeGen/LiveRangeEdit.cpp +++ b/lib/CodeGen/LiveRangeEdit.cpp @@ -11,6 +11,7 @@ // is spilled or split. //===----------------------------------------------------------------------===// +#define DEBUG_TYPE "regalloc" #include "LiveRangeEdit.h" #include "VirtRegMap.h" #include "llvm/ADT/SetVector.h"