From: Arnd Bergmann <arnd@arndb.de>
Date: Thu, 15 Nov 2012 16:59:54 +0000 (+0100)
Subject: Merge branch 'omap/cleanup-prcm-part2' into next/dt
X-Git-Tag: firefly_0821_release~3680^2~1479^2~17
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=cff9f37a1e7b2565f254b5ab40c3213cc0f823a1;hp=-c;p=firefly-linux-kernel-4.4.55.git

Merge branch 'omap/cleanup-prcm-part2' into next/dt

This resolves a nontrivial conflict where the omap_prcm_restart
is removed in one branch but another use is added in another
branch.

Conflicts:
	arch/arm/mach-omap2/cm33xx.c
	arch/arm/mach-omap2/io.c
	arch/arm/mach-omap2/prm_common.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---

cff9f37a1e7b2565f254b5ab40c3213cc0f823a1
diff --combined arch/arm/mach-omap1/common.h
index fc8c9449eba8,ecd0bb664dad..b53e0854422f
--- a/arch/arm/mach-omap1/common.h
+++ b/arch/arm/mach-omap1/common.h
@@@ -26,10 -26,11 +26,10 @@@
  #ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
  #define __ARCH_ARM_MACH_OMAP1_COMMON_H
  
 -#include "../plat-omap/common.h"
  #include <linux/mtd/mtd.h>
  #include <linux/i2c-omap.h>
  
 -#include "../plat-omap/i2c.h"
 +#include <plat/i2c.h>
  
  #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
  void omap7xx_map_io(void);
@@@ -93,4 -94,6 +93,6 @@@ extern int ocpi_enable(void)
  static inline int ocpi_enable(void) { return 0; }
  #endif
  
+ extern u32 omap1_get_reset_sources(void);
+ 
  #endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */
diff --combined arch/arm/mach-omap1/devices.c
index 7155ed8b97f8,745031870ce4..0af635205e8a
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@@ -17,6 -17,8 +17,8 @@@
  #include <linux/platform_device.h>
  #include <linux/spi/spi.h>
  
+ #include <linux/platform_data/omap-wd-timer.h>
+ 
  #include <asm/mach/map.h>
  
  #include <mach/tc.h>
@@@ -26,11 -28,12 +28,11 @@@
  #include <mach/camera.h>
  #include <mach/hardware.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "common.h"
  #include "clock.h"
  #include "dma.h"
  #include "mmc.h"
 +#include "sram.h"
  
  #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
  
@@@ -447,18 -450,31 +449,31 @@@ static struct resource wdt_resources[] 
  };
  
  static struct platform_device omap_wdt_device = {
- 	.name	   = "omap_wdt",
- 	.id	     = -1,
+ 	.name		= "omap_wdt",
+ 	.id		= -1,
  	.num_resources	= ARRAY_SIZE(wdt_resources),
  	.resource	= wdt_resources,
  };
  
  static int __init omap_init_wdt(void)
  {
+ 	struct omap_wd_timer_platform_data pdata;
+ 	int ret;
+ 
  	if (!cpu_is_omap16xx())
  		return -ENODEV;
  
- 	return platform_device_register(&omap_wdt_device);
+ 	pdata.read_reset_sources = omap1_get_reset_sources;
+ 
+ 	ret = platform_device_register(&omap_wdt_device);
+ 	if (!ret) {
+ 		ret = platform_device_add_data(&omap_wdt_device, &pdata,
+ 					       sizeof(pdata));
+ 		if (ret)
+ 			platform_device_del(&omap_wdt_device);
+ 	}
+ 
+ 	return ret;
  }
  subsys_initcall(omap_init_wdt);
  #endif
diff --combined arch/arm/mach-omap2/Makefile
index b118ed5f61a9,96621a20413a..78cbb8c5992e
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@@ -5,30 -5,36 +5,36 @@@
  # Common support
  obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
  	 common.o gpio.o dma.o wd_timer.o display.o i2c.o hdq1w.o omap_hwmod.o \
 -	 omap_device.o
 +	 omap_device.o sram.o
  
- # INTCPS IP block support - XXX should be moved to drivers/
- obj-$(CONFIG_ARCH_OMAP2)		+= irq.o
- obj-$(CONFIG_ARCH_OMAP3)		+= irq.o
- obj-$(CONFIG_SOC_AM33XX)		+= irq.o
- 
- # Secure monitor API support
- obj-$(CONFIG_ARCH_OMAP3)		+= omap-smc.o omap-secure.o
- obj-$(CONFIG_ARCH_OMAP4)		+= omap-smc.o omap-secure.o
- obj-$(CONFIG_SOC_OMAP5)			+= omap-smc.o omap-secure.o
+ omap-2-3-common				= irq.o
+ hwmod-common				= omap_hwmod.o \
+ 					  omap_hwmod_common_data.o
+ clock-common				= clock.o clock_common_data.o \
+ 					  clkt_dpll.o clkt_clksel.o
+ secure-common				= omap-smc.o omap-secure.o
+ 
+ obj-$(CONFIG_ARCH_OMAP2) += $(omap-2-3-common) $(hwmod-common)
+ obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common)
+ obj-$(CONFIG_ARCH_OMAP4) += prm44xx.o $(hwmod-common) $(secure-common)
+ obj-$(CONFIG_SOC_AM33XX) += irq.o $(hwmod-common)
+ obj-$(CONFIG_SOC_OMAP5)	 += prm44xx.o $(hwmod-common) $(secure-common)
  
  ifneq ($(CONFIG_SND_OMAP_SOC_MCBSP),)
  obj-y += mcbsp.o
  endif
  
- obj-$(CONFIG_TWL4030_CORE)		+= omap_twl.o
+ obj-$(CONFIG_TWL4030_CORE) += omap_twl.o
+ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)	+= sdrc.o
  
  # SMP support ONLY available for OMAP4
  
  obj-$(CONFIG_SMP)			+= omap-smp.o omap-headsmp.o
  obj-$(CONFIG_HOTPLUG_CPU)		+= omap-hotplug.o
- obj-$(CONFIG_ARCH_OMAP4)		+= omap4-common.o omap-wakeupgen.o
- obj-$(CONFIG_SOC_OMAP5)			+= omap4-common.o omap-wakeupgen.o
+ omap-4-5-common				=  omap4-common.o omap-wakeupgen.o \
+ 					   sleep44xx.o
+ obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-4-5-common)
+ obj-$(CONFIG_SOC_OMAP5)			+= $(omap-4-5-common)
  
  plus_sec := $(call as-instr,.arch_extension sec,+sec)
  AFLAGS_omap-headsmp.o			:=-Wa,-march=armv7-a$(plus_sec)
@@@ -44,6 -50,11 +50,11 @@@ AFLAGS_sram242x.o			:=-Wa,-march=armv
  AFLAGS_sram243x.o			:=-Wa,-march=armv6
  AFLAGS_sram34xx.o			:=-Wa,-march=armv7-a
  
+ # Restart code (OMAP4/5 currently in omap4-common.c)
+ obj-$(CONFIG_SOC_OMAP2420)		+= omap2-restart.o
+ obj-$(CONFIG_SOC_OMAP2430)		+= omap2-restart.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= omap3-restart.o
+ 
  # Pin multiplexing
  obj-$(CONFIG_SOC_OMAP2420)		+= mux2420.o
  obj-$(CONFIG_SOC_OMAP2430)		+= mux2430.o
@@@ -53,7 -64,6 +64,6 @@@ obj-$(CONFIG_ARCH_OMAP4)		+= mux44xx.
  # SMS/SDRC
  obj-$(CONFIG_ARCH_OMAP2)		+= sdrc2xxx.o
  # obj-$(CONFIG_ARCH_OMAP3)		+= sdrc3xxx.o
- obj-$(CONFIG_SOC_HAS_OMAP2_SDRC)	+= sdrc.o
  
  # OPP table initialization
  ifeq ($(CONFIG_PM_OPP),y)
@@@ -64,16 -74,15 +74,16 @@@ endi
  
  # Power Management
  ifeq ($(CONFIG_PM),y)
- obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o sleep24xx.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= pm24xx.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= sleep24xx.o
  obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o
  obj-$(CONFIG_ARCH_OMAP4)		+= pm44xx.o omap-mpuss-lowpower.o
- obj-$(CONFIG_ARCH_OMAP4)		+= sleep44xx.o
- obj-$(CONFIG_SOC_OMAP5)			+= omap-mpuss-lowpower.o sleep44xx.o
+ obj-$(CONFIG_SOC_OMAP5)			+= omap-mpuss-lowpower.o
  obj-$(CONFIG_PM_DEBUG)			+= pm-debug.o
 +obj-$(CONFIG_OMAP_PM_NOOP)		+= omap-pm-noop.o
  
  obj-$(CONFIG_POWER_AVS_OMAP)		+= sr_device.o
- obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)	+= smartreflex-class3.o
+ obj-$(CONFIG_POWER_AVS_OMAP_CLASS3)    += smartreflex-class3.o
  
  AFLAGS_sleep24xx.o			:=-Wa,-march=armv6
  AFLAGS_sleep34xx.o			:=-Wa,-march=armv7-a$(plus_sec)
@@@ -85,76 -94,82 +95,82 @@@ endi
  endif
  
  ifeq ($(CONFIG_CPU_IDLE),y)
- obj-$(CONFIG_ARCH_OMAP3)		+= cpuidle34xx.o
- obj-$(CONFIG_ARCH_OMAP4)		+= cpuidle44xx.o
+ obj-$(CONFIG_ARCH_OMAP3)                += cpuidle34xx.o
+ obj-$(CONFIG_ARCH_OMAP4)                += cpuidle44xx.o
  endif
  
  # PRCM
- obj-y					+= prcm.o prm_common.o
- obj-$(CONFIG_ARCH_OMAP2)		+= cm2xxx_3xxx.o prm2xxx_3xxx.o
- obj-$(CONFIG_ARCH_OMAP3)		+= cm2xxx_3xxx.o prm2xxx_3xxx.o
+ obj-y					+= prm_common.o cm_common.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
  obj-$(CONFIG_ARCH_OMAP3)		+= vc3xxx_data.o vp3xxx_data.o
  obj-$(CONFIG_SOC_AM33XX)		+= prm33xx.o cm33xx.o
  omap-prcm-4-5-common			=  cminst44xx.o cm44xx.o prm44xx.o \
  					   prcm_mpu44xx.o prminst44xx.o \
- 					   vc44xx_data.o vp44xx_data.o \
- 					   prm44xx.o
+ 					   vc44xx_data.o vp44xx_data.o
  obj-$(CONFIG_ARCH_OMAP4)		+= $(omap-prcm-4-5-common)
  obj-$(CONFIG_SOC_OMAP5)			+= $(omap-prcm-4-5-common)
  
  # OMAP voltage domains
- obj-y					+= voltage.o vc.o vp.o
+ voltagedomain-common			:= voltage.o vc.o vp.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= $(voltagedomain-common)
  obj-$(CONFIG_ARCH_OMAP2)		+= voltagedomains2xxx_data.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= $(voltagedomain-common)
  obj-$(CONFIG_ARCH_OMAP3)		+= voltagedomains3xxx_data.o
+ obj-$(CONFIG_ARCH_OMAP4)		+= $(voltagedomain-common)
  obj-$(CONFIG_ARCH_OMAP4)		+= voltagedomains44xx_data.o
- obj-$(CONFIG_SOC_AM33XX)		+= voltagedomains33xx_data.o
+ obj-$(CONFIG_SOC_AM33XX)		+= $(voltagedomain-common)
+ obj-$(CONFIG_SOC_AM33XX)                += voltagedomains33xx_data.o
+ obj-$(CONFIG_SOC_OMAP5)			+= $(voltagedomain-common)
  
  # OMAP powerdomain framework
- obj-y					+= powerdomain.o powerdomain-common.o
+ powerdomain-common			+= powerdomain.o powerdomain-common.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= $(powerdomain-common)
  obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_data.o
- obj-$(CONFIG_ARCH_OMAP2)		+= powerdomain2xxx_3xxx.o
  obj-$(CONFIG_ARCH_OMAP2)		+= powerdomains2xxx_3xxx_data.o
- obj-$(CONFIG_ARCH_OMAP3)		+= powerdomain2xxx_3xxx.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= $(powerdomain-common)
  obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains3xxx_data.o
  obj-$(CONFIG_ARCH_OMAP3)		+= powerdomains2xxx_3xxx_data.o
- obj-$(CONFIG_ARCH_OMAP4)		+= powerdomain44xx.o
+ obj-$(CONFIG_ARCH_OMAP4)		+= $(powerdomain-common)
  obj-$(CONFIG_ARCH_OMAP4)		+= powerdomains44xx_data.o
- obj-$(CONFIG_SOC_AM33XX)		+= powerdomain33xx.o
+ obj-$(CONFIG_SOC_AM33XX)		+= $(powerdomain-common)
  obj-$(CONFIG_SOC_AM33XX)		+= powerdomains33xx_data.o
- obj-$(CONFIG_SOC_OMAP5)			+= powerdomain44xx.o
+ obj-$(CONFIG_SOC_OMAP5)			+= $(powerdomain-common)
  
  # PRCM clockdomain control
- obj-y					+= clockdomain.o
- obj-$(CONFIG_ARCH_OMAP2)		+= clockdomain2xxx_3xxx.o
+ clockdomain-common			+= clockdomain.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= $(clockdomain-common)
  obj-$(CONFIG_ARCH_OMAP2)		+= clockdomains2xxx_3xxx_data.o
  obj-$(CONFIG_SOC_OMAP2420)		+= clockdomains2420_data.o
  obj-$(CONFIG_SOC_OMAP2430)		+= clockdomains2430_data.o
- obj-$(CONFIG_ARCH_OMAP3)		+= clockdomain2xxx_3xxx.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= $(clockdomain-common)
  obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains2xxx_3xxx_data.o
  obj-$(CONFIG_ARCH_OMAP3)		+= clockdomains3xxx_data.o
- obj-$(CONFIG_ARCH_OMAP4)		+= clockdomain44xx.o
+ obj-$(CONFIG_ARCH_OMAP4)		+= $(clockdomain-common)
  obj-$(CONFIG_ARCH_OMAP4)		+= clockdomains44xx_data.o
- obj-$(CONFIG_SOC_AM33XX)		+= clockdomain33xx.o
+ obj-$(CONFIG_SOC_AM33XX)		+= $(clockdomain-common)
  obj-$(CONFIG_SOC_AM33XX)		+= clockdomains33xx_data.o
- obj-$(CONFIG_SOC_OMAP5)			+= clockdomain44xx.o
+ obj-$(CONFIG_SOC_OMAP5)			+= $(clockdomain-common)
  
  # Clock framework
- obj-y					+= clock.o clock_common_data.o \
- 					   clkt_dpll.o clkt_clksel.o
- obj-$(CONFIG_ARCH_OMAP2)		+= clock2xxx.o
- obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpllcore.o clkt2xxx_sys.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= $(clock-common) clock2xxx.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_sys.o
+ obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpllcore.o
  obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_virt_prcm_set.o
  obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_apll.o clkt2xxx_osc.o
  obj-$(CONFIG_ARCH_OMAP2)		+= clkt2xxx_dpll.o clkt_iclk.o
  obj-$(CONFIG_SOC_OMAP2420)		+= clock2420_data.o
  obj-$(CONFIG_SOC_OMAP2430)		+= clock2430.o clock2430_data.o
- obj-$(CONFIG_ARCH_OMAP3)		+= clock3xxx.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= $(clock-common) clock3xxx.o
  obj-$(CONFIG_ARCH_OMAP3)		+= clock34xx.o clkt34xx_dpll3m2.o
- obj-$(CONFIG_ARCH_OMAP3)		+= clock3517.o clock36xx.o clkt_iclk.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= clock3517.o clock36xx.o
  obj-$(CONFIG_ARCH_OMAP3)		+= dpll3xxx.o clock3xxx_data.o
- obj-$(CONFIG_ARCH_OMAP4)		+= clock44xx_data.o
+ obj-$(CONFIG_ARCH_OMAP3)		+= clkt_iclk.o
+ obj-$(CONFIG_ARCH_OMAP4)		+= $(clock-common) clock44xx_data.o
  obj-$(CONFIG_ARCH_OMAP4)		+= dpll3xxx.o dpll44xx.o
- obj-$(CONFIG_SOC_AM33XX)		+= dpll3xxx.o clock33xx_data.o
+ obj-$(CONFIG_SOC_AM33XX)		+= $(clock-common) dpll3xxx.o
+ obj-$(CONFIG_SOC_AM33XX)		+= clock33xx_data.o
+ obj-$(CONFIG_SOC_OMAP5)			+= $(clock-common)
  obj-$(CONFIG_SOC_OMAP5)			+= dpll3xxx.o dpll44xx.o
  
  # OMAP2 clock rate set data (old "OPP" data)
@@@ -162,7 -177,6 +178,6 @@@ obj-$(CONFIG_SOC_OMAP2420)		+= opp2420_
  obj-$(CONFIG_SOC_OMAP2430)		+= opp2430_data.o
  
  # hwmod data
- obj-y					+= omap_hwmod_common_data.o
  obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_ipblock_data.o
  obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_3xxx_ipblock_data.o
  obj-$(CONFIG_SOC_OMAP2420)		+= omap_hwmod_2xxx_interconnect_data.o
@@@ -208,10 -222,10 +223,10 @@@ obj-$(CONFIG_MACH_OMAP_H4)		+= board-h4
  obj-$(CONFIG_MACH_OMAP_2430SDP)		+= board-2430sdp.o
  obj-$(CONFIG_MACH_OMAP_APOLLON)		+= board-apollon.o
  obj-$(CONFIG_MACH_OMAP3_BEAGLE)		+= board-omap3beagle.o
- obj-$(CONFIG_MACH_DEVKIT8000)		+= board-devkit8000.o
+ obj-$(CONFIG_MACH_DEVKIT8000)     	+= board-devkit8000.o
  obj-$(CONFIG_MACH_OMAP_LDP)		+= board-ldp.o
- obj-$(CONFIG_MACH_OMAP3530_LV_SOM)	+= board-omap3logic.o
- obj-$(CONFIG_MACH_OMAP3_TORPEDO)	+= board-omap3logic.o
+ obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o
+ obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o
  obj-$(CONFIG_MACH_ENCORE)		+= board-omap3encore.o
  obj-$(CONFIG_MACH_OVERO)		+= board-overo.o
  obj-$(CONFIG_MACH_OMAP3EVM)		+= board-omap3evm.o
diff --combined arch/arm/mach-omap2/board-2430sdp.c
index d1c01625fe5a,acb0a524ff7b..4815ea6f8f5d
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@@ -28,6 -28,7 +28,6 @@@
  #include <linux/io.h>
  #include <linux/gpio.h>
  
 -#include <mach/hardware.h>
  #include <asm/mach-types.h>
  #include <asm/mach/arch.h>
  #include <asm/mach/map.h>
@@@ -285,5 -286,5 +285,5 @@@ MACHINE_START(OMAP_2430SDP, "OMAP2430 s
  	.init_machine	= omap_2430sdp_init,
  	.init_late	= omap2430_init_late,
  	.timer		= &omap2_timer,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap2xxx_restart,
  MACHINE_END
diff --combined arch/arm/mach-omap2/board-cm-t35.c
index a8cad2237a2a,488f86fd0e72..c8e37dc00892
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@@ -44,6 -44,8 +44,6 @@@
  #include <video/omap-panel-tfp410.h>
  #include <linux/platform_data/spi-omap2-mcspi.h>
  
 -#include <mach/hardware.h>
 -
  #include "common.h"
  #include "mux.h"
  #include "sdram-micron-mt46h32m32lf-6.h"
@@@ -751,18 -753,18 +751,18 @@@ MACHINE_START(CM_T35, "Compulab CM-T35"
  	.init_machine	= cm_t35_init,
  	.init_late	= omap35xx_init_late,
  	.timer		= &omap3_timer,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap3xxx_restart,
  MACHINE_END
  
  MACHINE_START(CM_T3730, "Compulab CM-T3730")
- 	.atag_offset    = 0x100,
- 	.reserve        = omap_reserve,
- 	.map_io         = omap3_map_io,
- 	.init_early     = omap3630_init_early,
- 	.init_irq       = omap3_init_irq,
+ 	.atag_offset	= 0x100,
+ 	.reserve	= omap_reserve,
+ 	.map_io		= omap3_map_io,
+ 	.init_early	= omap3630_init_early,
+ 	.init_irq	= omap3_init_irq,
  	.handle_irq	= omap3_intc_handle_irq,
- 	.init_machine   = cm_t3730_init,
+ 	.init_machine	= cm_t3730_init,
  	.init_late     = omap3630_init_late,
- 	.timer          = &omap3_timer,
- 	.restart	= omap_prcm_restart,
+ 	.timer		= &omap3_timer,
+ 	.restart	= omap3xxx_restart,
  MACHINE_END
diff --combined arch/arm/mach-omap2/board-generic.c
index d69018028d96,475e14f07216..f0715a369c44
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@@ -57,7 -57,7 +57,7 @@@ DT_MACHINE_START(OMAP242X_DT, "Generic 
  	.init_machine	= omap_generic_init,
  	.timer		= &omap2_timer,
  	.dt_compat	= omap242x_boards_compat,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap2xxx_restart,
  MACHINE_END
  #endif
  
@@@ -76,7 -76,7 +76,7 @@@ DT_MACHINE_START(OMAP243X_DT, "Generic 
  	.init_machine	= omap_generic_init,
  	.timer		= &omap2_timer,
  	.dt_compat	= omap243x_boards_compat,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap2xxx_restart,
  MACHINE_END
  #endif
  
@@@ -95,25 -95,8 +95,25 @@@ DT_MACHINE_START(OMAP3_DT, "Generic OMA
  	.init_machine	= omap_generic_init,
  	.timer		= &omap3_timer,
  	.dt_compat	= omap3_boards_compat,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap3xxx_restart,
  MACHINE_END
 +
 +static const char *omap3_gp_boards_compat[] __initdata = {
 +	"ti,omap3-beagle",
 +	NULL,
 +};
 +
 +DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
 +	.reserve	= omap_reserve,
 +	.map_io		= omap3_map_io,
 +	.init_early	= omap3430_init_early,
 +	.init_irq	= omap_intc_of_init,
 +	.handle_irq	= omap3_intc_handle_irq,
 +	.init_machine	= omap_generic_init,
 +	.timer		= &omap3_secure_timer,
 +	.dt_compat	= omap3_gp_boards_compat,
- 	.restart	= omap_prcm_restart,
++	.restart	= omap3xxx_restart,
 +MACHINE_END
  #endif
  
  #ifdef CONFIG_SOC_AM33XX
@@@ -151,7 -134,7 +151,7 @@@ DT_MACHINE_START(OMAP4_DT, "Generic OMA
  	.init_late	= omap4430_init_late,
  	.timer		= &omap4_timer,
  	.dt_compat	= omap4_boards_compat,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap44xx_restart,
  MACHINE_END
  #endif
  
@@@ -171,6 -154,6 +171,6 @@@ DT_MACHINE_START(OMAP5_DT, "Generic OMA
  	.init_machine	= omap_generic_init,
  	.timer		= &omap5_timer,
  	.dt_compat	= omap5_boards_compat,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap44xx_restart,
  MACHINE_END
  #endif
diff --combined arch/arm/mach-omap2/board-h4.c
index 8668c72ee810,3c1e458f68a1..b626dbe6f7bc
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@@ -33,7 -33,7 +33,7 @@@
  #include <asm/mach/map.h>
  
  #include <plat-omap/dma-omap.h>
 -#include "debug-devices.h"
 +#include <plat/debug-devices.h>
  
  #include <video/omapdss.h>
  #include <video/omap-panel-generic-dpi.h>
@@@ -386,5 -386,5 +386,5 @@@ MACHINE_START(OMAP_H4, "OMAP2420 H4 boa
  	.init_machine	= omap_h4_init,
  	.init_late	= omap2420_init_late,
  	.timer		= &omap2_timer,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap2xxx_restart,
  MACHINE_END
diff --combined arch/arm/mach-omap2/board-omap3beagle.c
index 5a3800da903f,8471c279ecd8..22c483d5dfa8
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@@ -24,7 -24,6 +24,7 @@@
  #include <linux/input.h>
  #include <linux/gpio_keys.h>
  #include <linux/opp.h>
 +#include <linux/cpu.h>
  
  #include <linux/mtd/mtd.h>
  #include <linux/mtd/partitions.h>
@@@ -448,31 -447,27 +448,31 @@@ static struct omap_board_mux board_mux[
  };
  #endif
  
 -static void __init beagle_opp_init(void)
 +static int __init beagle_opp_init(void)
  {
  	int r = 0;
  
 -	/* Initialize the omap3 opp table */
 -	if (omap3_opp_init()) {
 +	if (!machine_is_omap3_beagle())
 +		return 0;
 +
 +	/* Initialize the omap3 opp table if not already created. */
 +	r = omap3_opp_init();
 +	if (IS_ERR_VALUE(r) && (r != -EEXIST)) {
  		pr_err("%s: opp default init failed\n", __func__);
 -		return;
 +		return r;
  	}
  
  	/* Custom OPP enabled for all xM versions */
  	if (cpu_is_omap3630()) {
  		struct device *mpu_dev, *iva_dev;
  
 -		mpu_dev = omap_device_get_by_hwmod_name("mpu");
 +		mpu_dev = get_cpu_device(0);
  		iva_dev = omap_device_get_by_hwmod_name("iva");
  
  		if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
  			pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
  				__func__, mpu_dev, iva_dev);
 -			return;
 +			return -ENODEV;
  		}
  		/* Enable MPU 1GHz and lower opps */
  		r = opp_enable(mpu_dev, 800000000);
@@@ -492,9 -487,8 +492,9 @@@
  			opp_disable(iva_dev, 660000000);
  		}
  	}
 -	return;
 +	return 0;
  }
 +device_initcall(beagle_opp_init);
  
  static void __init omap3_beagle_init(void)
  {
@@@ -532,6 -526,8 +532,6 @@@
  	/* Ensure SDRC pins are mux'd for self-refresh */
  	omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
  	omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
 -
 -	beagle_opp_init();
  }
  
  MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
@@@ -545,5 -541,5 +545,5 @@@
  	.init_machine	= omap3_beagle_init,
  	.init_late	= omap3_init_late,
  	.timer		= &omap3_secure_timer,
- 	.restart	= omap_prcm_restart,
+ 	.restart	= omap3xxx_restart,
  MACHINE_END
diff --combined arch/arm/mach-omap2/clkt2xxx_dpllcore.c
index 0d2f14c2dcce,e687163a68fe..825e44cdf1cf
--- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
+++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c
@@@ -25,19 -25,26 +25,25 @@@
  #include <linux/clk.h>
  #include <linux/io.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "clock.h"
  #include "clock2xxx.h"
  #include "opp2xxx.h"
- #include "cm2xxx_3xxx.h"
+ #include "cm2xxx.h"
  #include "cm-regbits-24xx.h"
  #include "sdrc.h"
 +#include "sram.h"
  
  /* #define DOWN_VARIABLE_DPLL 1 */		/* Experimental */
  
+ /*
+  * dpll_core_ck: pointer to the combined dpll_ck + core_ck on OMAP2xxx
+  * (currently defined as "dpll_ck" in the OMAP2xxx clock tree).  Set
+  * during dpll_ck init and used later by omap2xxx_clk_get_core_rate().
+  */
+ static struct clk *dpll_core_ck;
+ 
  /**
   * omap2xxx_clk_get_core_rate - return the CORE_CLK rate
-  * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck")
   *
   * Returns the CORE_CLK rate.  CORE_CLK can have one of three rate
   * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz
@@@ -45,12 -52,14 +51,14 @@@
   * struct clk *dpll_ck, which is a composite clock of dpll_ck and
   * core_ck.
   */
- unsigned long omap2xxx_clk_get_core_rate(struct clk *clk)
+ unsigned long omap2xxx_clk_get_core_rate(void)
  {
  	long long core_clk;
  	u32 v;
  
- 	core_clk = omap2_get_dpll_rate(clk);
+ 	WARN_ON(!dpll_core_ck);
+ 
+ 	core_clk = omap2_get_dpll_rate(dpll_core_ck);
  
  	v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
  	v &= OMAP24XX_CORE_CLK_SRC_MASK;
@@@ -98,7 -107,7 +106,7 @@@ static long omap2_dpllcore_round_rate(u
  
  unsigned long omap2_dpllcore_recalc(struct clk *clk)
  {
- 	return omap2xxx_clk_get_core_rate(clk);
+ 	return omap2xxx_clk_get_core_rate();
  }
  
  int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
@@@ -108,7 -117,7 +116,7 @@@
  	struct prcm_config tmpset;
  	const struct dpll_data *dd;
  
- 	cur_rate = omap2xxx_clk_get_core_rate(dclk);
+ 	cur_rate = omap2xxx_clk_get_core_rate();
  	mult = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
  	mult &= OMAP24XX_CORE_CLK_SRC_MASK;
  
@@@ -169,3 -178,19 +177,19 @@@
  	return 0;
  }
  
+ /**
+  * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck
+  * @clk: struct clk *dpll_ck
+  *
+  * Store a local copy of @clk in dpll_core_ck so other code can query
+  * the core rate without having to clk_get(), which can sleep.  Must
+  * only be called once.  No return value.  XXX If the clock
+  * registration process is ever changed such that dpll_ck is no longer
+  * statically defined, this code may need to change to increment some
+  * kind of use count on dpll_ck.
+  */
+ void omap2xxx_clkt_dpllcore_init(struct clk *clk)
+ {
+ 	WARN(dpll_core_ck, "dpll_core_ck already set - should never happen");
+ 	dpll_core_ck = clk;
+ }
diff --combined arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
index a38ebb209721,b9b981bac9d3..1c2041fbd718
--- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
+++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c
@@@ -1,7 -1,7 +1,7 @@@
  /*
   * OMAP2xxx DVFS virtual clock functions
   *
-  * Copyright (C) 2005-2008 Texas Instruments, Inc.
+  * Copyright (C) 2005-2008, 2012 Texas Instruments, Inc.
   * Copyright (C) 2004-2010 Nokia Corporation
   *
   * Contacts:
@@@ -33,18 -33,26 +33,25 @@@
  #include <linux/cpufreq.h>
  #include <linux/slab.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "soc.h"
  #include "clock.h"
  #include "clock2xxx.h"
  #include "opp2xxx.h"
- #include "cm2xxx_3xxx.h"
+ #include "cm2xxx.h"
  #include "cm-regbits-24xx.h"
  #include "sdrc.h"
 +#include "sram.h"
  
  const struct prcm_config *curr_prcm_set;
  const struct prcm_config *rate_table;
  
+ /*
+  * sys_ck_rate: the rate of the external high-frequency clock
+  * oscillator on the board.  Set by the SoC-specific clock init code.
+  * Once set during a boot, will not change.
+  */
+ static unsigned long sys_ck_rate;
+ 
  /**
   * omap2_table_mpu_recalc - just return the MPU speed
   * @clk: virt_prcm_set struct clk
@@@ -66,15 -74,14 +73,14 @@@ unsigned long omap2_table_mpu_recalc(st
  long omap2_round_to_table_rate(struct clk *clk, unsigned long rate)
  {
  	const struct prcm_config *ptr;
- 	long highest_rate, sys_clk_rate;
+ 	long highest_rate;
  
  	highest_rate = -EINVAL;
- 	sys_clk_rate = __clk_get_rate(sclk);
  
  	for (ptr = rate_table; ptr->mpu_speed; ptr++) {
  		if (!(ptr->flags & cpu_mask))
  			continue;
- 		if (ptr->xtal_speed != sys_clk_rate)
+ 		if (ptr->xtal_speed != sys_ck_rate)
  			continue;
  
  		highest_rate = ptr->mpu_speed;
@@@ -93,15 -100,12 +99,12 @@@ int omap2_select_table_rate(struct clk 
  	const struct prcm_config *prcm;
  	unsigned long found_speed = 0;
  	unsigned long flags;
- 	long sys_clk_rate;
- 
- 	sys_clk_rate = __clk_get_rate(sclk);
  
  	for (prcm = rate_table; prcm->mpu_speed; prcm++) {
  		if (!(prcm->flags & cpu_mask))
  			continue;
  
- 		if (prcm->xtal_speed != sys_clk_rate)
+ 		if (prcm->xtal_speed != sys_ck_rate)
  			continue;
  
  		if (prcm->mpu_speed <= rate) {
@@@ -117,7 -121,7 +120,7 @@@
  	}
  
  	curr_prcm_set = prcm;
- 	cur_rate = omap2xxx_clk_get_core_rate(dclk);
+ 	cur_rate = omap2xxx_clk_get_core_rate();
  
  	if (prcm->dpll_speed == cur_rate / 2) {
  		omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1);
@@@ -167,3 -171,50 +170,50 @@@
  
  	return 0;
  }
+ 
+ /**
+  * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate
+  * table sets matches the current CORE DPLL hardware rate
+  *
+  * Check the MPU rate set by bootloader.  Sets the 'curr_prcm_set'
+  * global to point to the active rate set when found; otherwise, sets
+  * it to NULL.  No return value;
+  */
+ void omap2xxx_clkt_vps_check_bootloader_rates(void)
+ {
+ 	const struct prcm_config *prcm = NULL;
+ 	unsigned long rate;
+ 
+ 	rate = omap2xxx_clk_get_core_rate();
+ 	for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+ 		if (!(prcm->flags & cpu_mask))
+ 			continue;
+ 		if (prcm->xtal_speed != sys_ck_rate)
+ 			continue;
+ 		if (prcm->dpll_speed <= rate)
+ 			break;
+ 	}
+ 	curr_prcm_set = prcm;
+ }
+ 
+ /**
+  * omap2xxx_clkt_vps_late_init - store a copy of the sys_ck rate
+  *
+  * Store a copy of the sys_ck rate for later use by the OMAP2xxx DVFS
+  * code.  (The sys_ck rate does not -- or rather, must not -- change
+  * during kernel runtime.)  Must be called after we have a valid
+  * sys_ck rate, but before the virt_prcm_set clock rate is
+  * recalculated.  No return value.
+  */
+ void omap2xxx_clkt_vps_late_init(void)
+ {
+ 	struct clk *c;
+ 
+ 	c = clk_get(NULL, "sys_ck");
+ 	if (IS_ERR(c)) {
+ 		WARN(1, "could not locate sys_ck\n");
+ 	} else {
+ 		sys_ck_rate = clk_get_rate(c);
+ 		clk_put(c);
+ 	}
+ }
diff --combined arch/arm/mach-omap2/cm33xx.c
index ed8dcaf4c849,b2dfcd777194..058ce3c0873e
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@@ -22,6 -22,9 +22,7 @@@
  #include <linux/err.h>
  #include <linux/io.h>
  
 -#include "../plat-omap/common.h"
 -
+ #include "clockdomain.h"
  #include "cm.h"
  #include "cm33xx.h"
  #include "cm-regbits-34xx.h"
@@@ -309,3 -312,58 +310,58 @@@ void am33xx_cm_module_disable(u16 inst
  	v &= ~AM33XX_MODULEMODE_MASK;
  	am33xx_cm_write_reg(v, inst, clkctrl_offs);
  }
+ 
+ /*
+  * Clockdomain low-level functions
+  */
+ 
+ static int am33xx_clkdm_sleep(struct clockdomain *clkdm)
+ {
+ 	am33xx_cm_clkdm_force_sleep(clkdm->cm_inst, clkdm->clkdm_offs);
+ 	return 0;
+ }
+ 
+ static int am33xx_clkdm_wakeup(struct clockdomain *clkdm)
+ {
+ 	am33xx_cm_clkdm_force_wakeup(clkdm->cm_inst, clkdm->clkdm_offs);
+ 	return 0;
+ }
+ 
+ static void am33xx_clkdm_allow_idle(struct clockdomain *clkdm)
+ {
+ 	am33xx_cm_clkdm_enable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+ }
+ 
+ static void am33xx_clkdm_deny_idle(struct clockdomain *clkdm)
+ {
+ 	am33xx_cm_clkdm_disable_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+ }
+ 
+ static int am33xx_clkdm_clk_enable(struct clockdomain *clkdm)
+ {
+ 	if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
+ 		return am33xx_clkdm_wakeup(clkdm);
+ 
+ 	return 0;
+ }
+ 
+ static int am33xx_clkdm_clk_disable(struct clockdomain *clkdm)
+ {
+ 	bool hwsup = false;
+ 
+ 	hwsup = am33xx_cm_is_clkdm_in_hwsup(clkdm->cm_inst, clkdm->clkdm_offs);
+ 
+ 	if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP))
+ 		am33xx_clkdm_sleep(clkdm);
+ 
+ 	return 0;
+ }
+ 
+ struct clkdm_ops am33xx_clkdm_operations = {
+ 	.clkdm_sleep		= am33xx_clkdm_sleep,
+ 	.clkdm_wakeup		= am33xx_clkdm_wakeup,
+ 	.clkdm_allow_idle	= am33xx_clkdm_allow_idle,
+ 	.clkdm_deny_idle	= am33xx_clkdm_deny_idle,
+ 	.clkdm_clk_enable	= am33xx_clkdm_clk_enable,
+ 	.clkdm_clk_disable	= am33xx_clkdm_clk_disable,
+ };
diff --combined arch/arm/mach-omap2/common.h
index 426fcfcfd821,c57eeeac7d11..08c586451f93
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@@ -34,6 -34,8 +34,6 @@@
  
  #include <asm/proc-fns.h>
  
 -#include "../plat-omap/common.h"
 -
  #include "i2c.h"
  #include "serial.h"
  
@@@ -41,54 -43,6 +41,6 @@@
  
  #define OMAP_INTC_START		NR_IRQS
  
- #ifdef CONFIG_SOC_OMAP2420
- extern void omap242x_map_common_io(void);
- #else
- static inline void omap242x_map_common_io(void)
- {
- }
- #endif
- 
- #ifdef CONFIG_SOC_OMAP2430
- extern void omap243x_map_common_io(void);
- #else
- static inline void omap243x_map_common_io(void)
- {
- }
- #endif
- 
- #ifdef CONFIG_ARCH_OMAP3
- extern void omap34xx_map_common_io(void);
- #else
- static inline void omap34xx_map_common_io(void)
- {
- }
- #endif
- 
- #ifdef CONFIG_SOC_TI81XX
- extern void omapti81xx_map_common_io(void);
- #else
- static inline void omapti81xx_map_common_io(void)
- {
- }
- #endif
- 
- #ifdef CONFIG_SOC_AM33XX
- extern void omapam33xx_map_common_io(void);
- #else
- static inline void omapam33xx_map_common_io(void)
- {
- }
- #endif
- 
- #ifdef CONFIG_ARCH_OMAP4
- extern void omap44xx_map_common_io(void);
- #else
- static inline void omap44xx_map_common_io(void)
- {
- }
- #endif
- 
  #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
  int omap2_pm_init(void);
  #else
@@@ -125,14 -79,6 +77,6 @@@ static inline int omap_mux_late_init(vo
  }
  #endif
  
- #ifdef CONFIG_SOC_OMAP5
- extern void omap5_map_common_io(void);
- #else
- static inline void omap5_map_common_io(void)
- {
- }
- #endif
- 
  extern void omap2_init_common_infrastructure(void);
  
  extern struct sys_timer omap2_timer;
@@@ -165,52 -111,43 +109,43 @@@ void am35xx_init_late(void)
  void ti81xx_init_late(void);
  void omap4430_init_late(void);
  int omap2_common_pm_late_init(void);
- void omap_prcm_restart(char, const char *);
  
- /*
-  * IO bases for various OMAP processors
-  * Except the tap base, rest all the io bases
-  * listed are physical addresses.
-  */
- struct omap_globals {
- 	u32		class;		/* OMAP class to detect */
- 	void __iomem	*tap;		/* Control module ID code */
- 	void __iomem	*sdrc;           /* SDRAM Controller */
- 	void __iomem	*sms;            /* SDRAM Memory Scheduler */
- 	void __iomem	*ctrl;           /* System Control Module */
- 	void __iomem	*ctrl_pad;	/* PAD Control Module */
- 	void __iomem	*prm;            /* Power and Reset Management */
- 	void __iomem	*cm;             /* Clock Management */
- 	void __iomem	*cm2;
- 	void __iomem	*prcm_mpu;
- };
- 
- void omap2_set_globals_242x(void);
- void omap2_set_globals_243x(void);
- void omap2_set_globals_3xxx(void);
- void omap2_set_globals_443x(void);
- void omap2_set_globals_5xxx(void);
- void omap2_set_globals_ti81xx(void);
- void omap2_set_globals_am33xx(void);
- 
- /* These get called from omap2_set_globals_xxxx(), do not call these */
- void omap2_set_globals_tap(struct omap_globals *);
- #if defined(CONFIG_SOC_HAS_OMAP2_SDRC)
- void omap2_set_globals_sdrc(struct omap_globals *);
+ #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
+ void omap2xxx_restart(char mode, const char *cmd);
  #else
- static inline void omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
- { }
+ static inline void omap2xxx_restart(char mode, const char *cmd)
+ {
+ }
  #endif
- void omap2_set_globals_control(struct omap_globals *);
- void omap2_set_globals_prcm(struct omap_globals *);
- 
- void omap242x_map_io(void);
- void omap243x_map_io(void);
- void omap3_map_io(void);
- void am33xx_map_io(void);
- void omap4_map_io(void);
- void omap5_map_io(void);
- void ti81xx_map_io(void);
+ 
+ #ifdef CONFIG_ARCH_OMAP3
+ void omap3xxx_restart(char mode, const char *cmd);
+ #else
+ static inline void omap3xxx_restart(char mode, const char *cmd)
+ {
+ }
+ #endif
+ 
+ #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
+ void omap44xx_restart(char mode, const char *cmd);
+ #else
+ static inline void omap44xx_restart(char mode, const char *cmd)
+ {
+ }
+ #endif
+ 
+ /* This gets called from mach-omap2/io.c, do not call this */
+ void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
+ 
+ void __init omap242x_map_io(void);
+ void __init omap243x_map_io(void);
+ void __init omap3_map_io(void);
+ void __init am33xx_map_io(void);
+ void __init omap4_map_io(void);
+ void __init omap5_map_io(void);
+ void __init ti81xx_map_io(void);
+ 
+ /* omap_barriers_init() is OMAP4 only */
  void omap_barriers_init(void);
  
  /**
@@@ -343,8 -280,5 +278,8 @@@ struct omap2_hsmmc_info
  extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
  extern void omap_reserve(void);
  
 +struct omap_hwmod;
 +extern int omap_dss_reset(struct omap_hwmod *);
 +
  #endif /* __ASSEMBLER__ */
  #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --combined arch/arm/mach-omap2/i2c.c
index 4e63097e3cd8,be092e8e5d85..fbb9b152cd5e
--- a/arch/arm/mach-omap2/i2c.c
+++ b/arch/arm/mach-omap2/i2c.c
@@@ -20,10 -20,11 +20,11 @@@
   */
  
  #include "soc.h"
- #include "common.h"
  #include "omap_hwmod.h"
  #include "omap_device.h"
  
+ #include "prm.h"
+ #include "common.h"
  #include "mux.h"
  #include "i2c.h"
  
@@@ -32,9 -33,6 +33,6 @@@
  #define OMAP2_I2C_CON_OFFSET			0x24
  #define OMAP4_I2C_CON_OFFSET			0xA4
  
- /* Maximum microseconds to wait for OMAP module to softreset */
- #define MAX_MODULE_SOFTRESET_WAIT	10000
- 
  #define MAX_OMAP_I2C_HWMOD_NAME_LEN	16
  
  static void __init omap2_i2c_mux_pins(int bus_id)
@@@ -109,19 -107,6 +107,19 @@@ int omap_i2c_reset(struct omap_hwmod *o
  	return 0;
  }
  
 +static int __init omap_i2c_nr_ports(void)
 +{
 +	int ports = 0;
 +
 +	if (cpu_is_omap24xx())
 +		ports = 2;
 +	else if (cpu_is_omap34xx())
 +		ports = 3;
 +	else if (cpu_is_omap44xx())
 +		ports = 4;
 +	return ports;
 +}
 +
  static const char name[] = "omap_i2c";
  
  int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
@@@ -134,9 -119,6 +132,9 @@@
  	struct omap_i2c_bus_platform_data *pdata;
  	struct omap_i2c_dev_attr *dev_attr;
  
 +	if (bus_id > omap_i2c_nr_ports())
 +		return -EINVAL;
 +
  	omap2_i2c_mux_pins(bus_id);
  
  	l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
diff --combined arch/arm/mach-omap2/io.c
index 807b8d919f81,c3472bd8e5a4..9df757644cce
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@@ -27,6 -27,8 +27,6 @@@
  
  #include <plat-omap/dma-omap.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "omap_hwmod.h"
  #include "soc.h"
  #include "iomap.h"
@@@ -40,9 -42,15 +40,17 @@@
  #include "clock44xx.h"
  #include "omap-pm.h"
  #include "sdrc.h"
+ #include "control.h"
  #include "serial.h"
 +#include "sram.h"
+ #include "cm2xxx.h"
+ #include "cm3xxx.h"
+ #include "prm.h"
+ #include "cm.h"
+ #include "prcm_mpu44xx.h"
+ #include "prminst44xx.h"
+ #include "cminst44xx.h"
 +
  /*
   * The machine specific code may provide the extra mapping besides the
   * default mapping provided here.
@@@ -264,7 -272,7 +272,7 @@@ static struct map_desc omap54xx_io_desc
  #endif
  
  #ifdef CONFIG_SOC_OMAP2420
- void __init omap242x_map_common_io(void)
+ void __init omap242x_map_io(void)
  {
  	iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
  	iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
@@@ -272,7 -280,7 +280,7 @@@
  #endif
  
  #ifdef CONFIG_SOC_OMAP2430
- void __init omap243x_map_common_io(void)
+ void __init omap243x_map_io(void)
  {
  	iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
  	iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
@@@ -280,28 -288,28 +288,28 @@@
  #endif
  
  #ifdef CONFIG_ARCH_OMAP3
- void __init omap34xx_map_common_io(void)
+ void __init omap3_map_io(void)
  {
  	iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
  }
  #endif
  
  #ifdef CONFIG_SOC_TI81XX
- void __init omapti81xx_map_common_io(void)
+ void __init ti81xx_map_io(void)
  {
  	iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
  }
  #endif
  
  #ifdef CONFIG_SOC_AM33XX
- void __init omapam33xx_map_common_io(void)
+ void __init am33xx_map_io(void)
  {
  	iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
  }
  #endif
  
  #ifdef CONFIG_ARCH_OMAP4
- void __init omap44xx_map_common_io(void)
+ void __init omap4_map_io(void)
  {
  	iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
  	omap_barriers_init();
@@@ -309,7 -317,7 +317,7 @@@
  #endif
  
  #ifdef CONFIG_SOC_OMAP5
- void __init omap5_map_common_io(void)
+ void __init omap5_map_io(void)
  {
  	iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
  }
@@@ -353,6 -361,11 +361,6 @@@ static int _set_hwmod_postsetup_state(s
  	return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
  }
  
 -static void __init omap_common_init_early(void)
 -{
 -	omap_init_consistent_dma_size();
 -}
 -
  static void __init omap_hwmod_init_postsetup(void)
  {
  	u8 postsetup_state;
@@@ -371,8 -384,16 +379,15 @@@
  #ifdef CONFIG_SOC_OMAP2420
  void __init omap2420_init_early(void)
  {
- 	omap2_set_globals_242x();
+ 	omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
+ 	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
+ 			       OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
+ 				  NULL);
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
  	omap2xxx_check_revision();
+ 	omap2xxx_cm_init();
 -	omap_common_init_early();
  	omap2xxx_voltagedomains_init();
  	omap242x_powerdomains_init();
  	omap242x_clockdomains_init();
@@@ -392,8 -413,16 +407,15 @@@ void __init omap2420_init_late(void
  #ifdef CONFIG_SOC_OMAP2430
  void __init omap2430_init_early(void)
  {
- 	omap2_set_globals_243x();
+ 	omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
+ 	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
+ 			       OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
+ 				  NULL);
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
  	omap2xxx_check_revision();
+ 	omap2xxx_cm_init();
 -	omap_common_init_early();
  	omap2xxx_voltagedomains_init();
  	omap243x_powerdomains_init();
  	omap243x_clockdomains_init();
@@@ -417,9 -446,17 +439,16 @@@ void __init omap2430_init_late(void
  #ifdef CONFIG_ARCH_OMAP3
  void __init omap3_init_early(void)
  {
- 	omap2_set_globals_3xxx();
+ 	omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
+ 	omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
+ 			       OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
+ 				  NULL);
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
  	omap3xxx_check_revision();
  	omap3xxx_check_features();
+ 	omap3xxx_cm_init();
 -	omap_common_init_early();
  	omap3xxx_voltagedomains_init();
  	omap3xxx_powerdomains_init();
  	omap3xxx_clockdomains_init();
@@@ -450,9 -487,15 +479,14 @@@ void __init am35xx_init_early(void
  
  void __init ti81xx_init_early(void)
  {
- 	omap2_set_globals_ti81xx();
+ 	omap2_set_globals_tap(OMAP343X_CLASS,
+ 			      OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
+ 				  NULL);
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
  	omap3xxx_check_revision();
  	ti81xx_check_features();
 -	omap_common_init_early();
  	omap3xxx_voltagedomains_init();
  	omap3xxx_powerdomains_init();
  	omap3xxx_clockdomains_init();
@@@ -507,9 -550,15 +541,14 @@@ void __init ti81xx_init_late(void
  #ifdef CONFIG_SOC_AM33XX
  void __init am33xx_init_early(void)
  {
- 	omap2_set_globals_am33xx();
+ 	omap2_set_globals_tap(AM335X_CLASS,
+ 			      AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
+ 	omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
+ 				  NULL);
+ 	omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
+ 	omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
  	omap3xxx_check_revision();
  	ti81xx_check_features();
 -	omap_common_init_early();
  	am33xx_voltagedomains_init();
  	am33xx_powerdomains_init();
  	am33xx_clockdomains_init();
@@@ -522,9 -571,19 +561,18 @@@
  #ifdef CONFIG_ARCH_OMAP4
  void __init omap4430_init_early(void)
  {
- 	omap2_set_globals_443x();
+ 	omap2_set_globals_tap(OMAP443X_CLASS,
+ 			      OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
+ 				  OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
+ 			     OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
+ 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
+ 	omap_prm_base_init();
+ 	omap_cm_base_init();
  	omap4xxx_check_revision();
  	omap4xxx_check_features();
 -	omap_common_init_early();
  	omap44xx_voltagedomains_init();
  	omap44xx_powerdomains_init();
  	omap44xx_clockdomains_init();
@@@ -544,8 -603,18 +592,17 @@@ void __init omap4430_init_late(void
  #ifdef CONFIG_SOC_OMAP5
  void __init omap5_init_early(void)
  {
- 	omap2_set_globals_5xxx();
+ 	omap2_set_globals_tap(OMAP54XX_CLASS,
+ 			      OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
+ 	omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
+ 				  OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
+ 	omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
+ 	omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
+ 			     OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
+ 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
+ 	omap_prm_base_init();
+ 	omap_cm_base_init();
  	omap5xxx_check_revision();
 -	omap_common_init_early();
  }
  #endif
  
diff --combined arch/arm/mach-omap2/omap4-common.c
index 3cfcd41bf8fa,64fce07a3ccd..5695885ea340
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@@ -25,14 -25,18 +25,17 @@@
  #include <asm/mach/map.h>
  #include <asm/memblock.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "omap-wakeupgen.h"
  #include "soc.h"
+ #include "iomap.h"
  #include "common.h"
  #include "mmc.h"
  #include "hsmmc.h"
+ #include "prminst44xx.h"
+ #include "prcm_mpu44xx.h"
  #include "omap4-sar-layout.h"
  #include "omap-secure.h"
 +#include "sram.h"
  
  #ifdef CONFIG_CACHE_L2X0
  static void __iomem *l2cache_base;
@@@ -279,3 -283,19 +282,19 @@@ int __init omap4_twl6030_hsmmc_init(str
  	return 0;
  }
  #endif
+ 
+ /**
+  * omap44xx_restart - trigger a software restart of the SoC
+  * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c
+  * @cmd: passed from the userspace program rebooting the system (if provided)
+  *
+  * Resets the SoC.  For @cmd, see the 'reboot' syscall in
+  * kernel/sys.c.  No return value.
+  */
+ void omap44xx_restart(char mode, const char *cmd)
+ {
+ 	/* XXX Should save 'cmd' into scratchpad for use after reboot */
+ 	omap4_prminst_global_warm_sw_reset(); /* never returns */
+ 	while (1);
+ }
+ 
diff --combined arch/arm/mach-omap2/pm24xx.c
index 9a2f5594a7dc,83815ddc4786..13e1f4303989
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@@ -31,8 -31,6 +31,8 @@@
  #include <linux/gpio.h>
  #include <linux/platform_data/gpio-omap.h>
  
 +#include <asm/fncpy.h>
 +
  #include <asm/mach/time.h>
  #include <asm/mach/irq.h>
  #include <asm/mach-types.h>
@@@ -40,15 -38,16 +40,15 @@@
  
  #include <plat-omap/dma-omap.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "soc.h"
  #include "common.h"
  #include "clock.h"
- #include "prm2xxx_3xxx.h"
+ #include "prm2xxx.h"
  #include "prm-regbits-24xx.h"
- #include "cm2xxx_3xxx.h"
+ #include "cm2xxx.h"
  #include "cm-regbits-24xx.h"
  #include "sdrc.h"
 +#include "sram.h"
  #include "pm.h"
  #include "control.h"
  #include "powerdomain.h"
diff --combined arch/arm/mach-omap2/pm34xx.c
index 11f9669eb7ed,aa701d76efda..770320061422
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@@ -32,26 -32,24 +32,24 @@@
  
  #include <trace/events/power.h>
  
 +#include <asm/fncpy.h>
  #include <asm/suspend.h>
  #include <asm/system_misc.h>
  
  #include "clockdomain.h"
  #include "powerdomain.h"
- #include <plat/prcm.h>
  #include <plat-omap/dma-omap.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "soc.h"
  #include "common.h"
- #include "cm2xxx_3xxx.h"
+ #include "cm3xxx.h"
  #include "cm-regbits-34xx.h"
  #include "gpmc.h"
  #include "prm-regbits-34xx.h"
- 
- #include "prm2xxx_3xxx.h"
+ #include "prm3xxx.h"
  #include "pm.h"
  #include "sdrc.h"
 +#include "sram.h"
  #include "control.h"
  
  /* pm34xx errata defined in pm.h */
@@@ -653,17 -651,14 +651,17 @@@ static void __init pm_errata_configure(
  		/* Enable the l2 cache toggling in sleep logic */
  		enable_omap3630_toggle_l2_on_restore();
  		if (omap_rev() < OMAP3630_REV_ES1_2)
 -			pm34xx_errata |= PM_SDRC_WAKEUP_ERRATUM_i583;
 +			pm34xx_errata |= (PM_SDRC_WAKEUP_ERRATUM_i583 |
 +					  PM_PER_MEMORIES_ERRATUM_i582);
 +	} else if (cpu_is_omap34xx()) {
 +		pm34xx_errata |= PM_PER_MEMORIES_ERRATUM_i582;
  	}
  }
  
  int __init omap3_pm_init(void)
  {
  	struct power_state *pwrst, *tmp;
 -	struct clockdomain *neon_clkdm, *mpu_clkdm;
 +	struct clockdomain *neon_clkdm, *mpu_clkdm, *per_clkdm, *wkup_clkdm;
  	int ret;
  
  	if (!omap3_has_io_chain_ctrl())
@@@ -715,8 -710,6 +713,8 @@@
  
  	neon_clkdm = clkdm_lookup("neon_clkdm");
  	mpu_clkdm = clkdm_lookup("mpu_clkdm");
 +	per_clkdm = clkdm_lookup("per_clkdm");
 +	wkup_clkdm = clkdm_lookup("wkup_clkdm");
  
  #ifdef CONFIG_SUSPEND
  	omap_pm_suspend = omap3_pm_suspend;
@@@ -733,27 -726,6 +731,27 @@@
  	if (IS_PM34XX_ERRATUM(PM_RTA_ERRATUM_i608))
  		omap3630_ctrl_disable_rta();
  
 +	/*
 +	 * The UART3/4 FIFO and the sidetone memory in McBSP2/3 are
 +	 * not correctly reset when the PER powerdomain comes back
 +	 * from OFF or OSWR when the CORE powerdomain is kept active.
 +	 * See OMAP36xx Erratum i582 "PER Domain reset issue after
 +	 * Domain-OFF/OSWR Wakeup".  This wakeup dependency is not a
 +	 * complete workaround.  The kernel must also prevent the PER
 +	 * powerdomain from going to OSWR/OFF while the CORE
 +	 * powerdomain is not going to OSWR/OFF.  And if PER last
 +	 * power state was off while CORE last power state was ON, the
 +	 * UART3/4 and McBSP2/3 SIDETONE devices need to run a
 +	 * self-test using their loopback tests; if that fails, those
 +	 * devices are unusable until the PER/CORE can complete a transition
 +	 * from ON to OSWR/OFF and then back to ON.
 +	 *
 +	 * XXX Technically this workaround is only needed if off-mode
 +	 * or OSWR is enabled.
 +	 */
 +	if (IS_PM34XX_ERRATUM(PM_PER_MEMORIES_ERRATUM_i582))
 +		clkdm_add_wkdep(per_clkdm, wkup_clkdm);
 +
  	clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
  	if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
  		omap3_secure_ram_storage =
diff --combined arch/arm/mach-omap2/prm33xx.c
index 0d8abb577669,53ec9cbaa3d3..1ac73883f891
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@@ -19,7 -19,10 +19,8 @@@
  #include <linux/err.h>
  #include <linux/io.h>
  
 -#include "../plat-omap/common.h"
 -
  #include "common.h"
+ #include "powerdomain.h"
  #include "prm33xx.h"
  #include "prm-regbits-33xx.h"
  
@@@ -131,3 -134,204 +132,204 @@@ int am33xx_prm_deassert_hardreset(u8 sh
  
  	return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
  }
+ 
+ static int am33xx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+ {
+ 	am33xx_prm_rmw_reg_bits(OMAP_POWERSTATE_MASK,
+ 				(pwrst << OMAP_POWERSTATE_SHIFT),
+ 				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+ {
+ 	u32 v;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs,  pwrdm->pwrstctrl_offs);
+ 	v &= OMAP_POWERSTATE_MASK;
+ 	v >>= OMAP_POWERSTATE_SHIFT;
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+ {
+ 	u32 v;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+ 	v &= OMAP_POWERSTATEST_MASK;
+ 	v >>= OMAP_POWERSTATEST_SHIFT;
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
+ {
+ 	u32 v;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+ 	v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
+ 	v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
+ {
+ 	am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
+ 				(1 << AM33XX_LOWPOWERSTATECHANGE_SHIFT),
+ 				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
+ {
+ 	am33xx_prm_rmw_reg_bits(AM33XX_LASTPOWERSTATEENTERED_MASK,
+ 				AM33XX_LASTPOWERSTATEENTERED_MASK,
+ 				pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
+ {
+ 	u32 m;
+ 
+ 	m = pwrdm->logicretstate_mask;
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+ 				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
+ {
+ 	u32 v;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+ 	v &= AM33XX_LOGICSTATEST_MASK;
+ 	v >>= AM33XX_LOGICSTATEST_SHIFT;
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_read_logic_retst(struct powerdomain *pwrdm)
+ {
+ 	u32 v, m;
+ 
+ 	m = pwrdm->logicretstate_mask;
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 	v &= m;
+ 	v >>= __ffs(m);
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
+ 		u8 pwrst)
+ {
+ 	u32 m;
+ 
+ 	m = pwrdm->mem_on_mask[bank];
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+ 				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank,
+ 					u8 pwrst)
+ {
+ 	u32 m;
+ 
+ 	m = pwrdm->mem_ret_mask[bank];
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	am33xx_prm_rmw_reg_bits(m, (pwrst << __ffs(m)),
+ 				pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 
+ 	return 0;
+ }
+ 
+ static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
+ {
+ 	u32 m, v;
+ 
+ 	m = pwrdm->mem_pwrst_mask[bank];
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
+ 	v &= m;
+ 	v >>= __ffs(m);
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank)
+ {
+ 	u32 m, v;
+ 
+ 	m = pwrdm->mem_retst_mask[bank];
+ 	if (!m)
+ 		return -EINVAL;
+ 
+ 	v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstctrl_offs);
+ 	v &= m;
+ 	v >>= __ffs(m);
+ 
+ 	return v;
+ }
+ 
+ static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
+ {
+ 	u32 c = 0;
+ 
+ 	/*
+ 	 * REVISIT: pwrdm_wait_transition() may be better implemented
+ 	 * via a callback and a periodic timer check -- how long do we expect
+ 	 * powerdomain transitions to take?
+ 	 */
+ 
+ 	/* XXX Is this udelay() value meaningful? */
+ 	while ((am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs)
+ 			& OMAP_INTRANSITION_MASK) &&
+ 			(c++ < PWRDM_TRANSITION_BAILOUT))
+ 		udelay(1);
+ 
+ 	if (c > PWRDM_TRANSITION_BAILOUT) {
+ 		pr_err("powerdomain: %s: waited too long to complete transition\n",
+ 		       pwrdm->name);
+ 		return -EAGAIN;
+ 	}
+ 
+ 	pr_debug("powerdomain: completed transition in %d loops\n", c);
+ 
+ 	return 0;
+ }
+ 
+ struct pwrdm_ops am33xx_pwrdm_operations = {
+ 	.pwrdm_set_next_pwrst		= am33xx_pwrdm_set_next_pwrst,
+ 	.pwrdm_read_next_pwrst		= am33xx_pwrdm_read_next_pwrst,
+ 	.pwrdm_read_pwrst		= am33xx_pwrdm_read_pwrst,
+ 	.pwrdm_read_prev_pwrst		= am33xx_pwrdm_read_prev_pwrst,
+ 	.pwrdm_set_logic_retst		= am33xx_pwrdm_set_logic_retst,
+ 	.pwrdm_read_logic_pwrst		= am33xx_pwrdm_read_logic_pwrst,
+ 	.pwrdm_read_logic_retst		= am33xx_pwrdm_read_logic_retst,
+ 	.pwrdm_clear_all_prev_pwrst	= am33xx_pwrdm_clear_all_prev_pwrst,
+ 	.pwrdm_set_lowpwrstchange	= am33xx_pwrdm_set_lowpwrstchange,
+ 	.pwrdm_read_mem_pwrst		= am33xx_pwrdm_read_mem_pwrst,
+ 	.pwrdm_read_mem_retst		= am33xx_pwrdm_read_mem_retst,
+ 	.pwrdm_set_mem_onst		= am33xx_pwrdm_set_mem_onst,
+ 	.pwrdm_set_mem_retst		= am33xx_pwrdm_set_mem_retst,
+ 	.pwrdm_wait_transition		= am33xx_pwrdm_wait_transition,
+ };
diff --combined arch/arm/mach-omap2/prm_common.c
index 3442227d3f0b,d2e0798a4c82..f596e1e91ffd
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@@ -24,10 -24,13 +24,11 @@@
  #include <linux/interrupt.h>
  #include <linux/slab.h>
  
- #include <plat/prcm.h>
 -#include "../plat-omap/common.h"
--
  #include "prm2xxx_3xxx.h"
+ #include "prm2xxx.h"
+ #include "prm3xxx.h"
  #include "prm44xx.h"
+ #include "common.h"
  
  /*
   * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@@ -52,6 -55,16 +53,16 @@@ static struct irq_chip_generic **prcm_i
   */
  static struct omap_prcm_irq_setup *prcm_irq_setup;
  
+ /* prm_base: base virtual address of the PRM IP block */
+ void __iomem *prm_base;
+ 
+ /*
+  * prm_ll_data: function pointers to SoC-specific implementations of
+  * common PRM functions
+  */
+ static struct prm_ll_data null_prm_ll_data;
+ static struct prm_ll_data *prm_ll_data = &null_prm_ll_data;
+ 
  /* Private functions */
  
  /*
@@@ -318,64 -331,82 +329,82 @@@ err
  	return -ENOMEM;
  }
  
- /*
-  * Stubbed functions so that common files continue to build when
-  * custom builds are used
-  * XXX These are temporary and should be removed at the earliest possible
-  * opportunity
+ /**
+  * omap2_set_globals_prm - set the PRM base address (for early use)
+  * @prm: PRM base virtual address
+  *
+  * XXX Will be replaced when the PRM/CM drivers are completed.
   */
- u32 __weak omap2_prm_read_mod_reg(s16 module, u16 idx)
+ void __init omap2_set_globals_prm(void __iomem *prm)
  {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
+ 	prm_base = prm;
  }
  
- void __weak omap2_prm_write_mod_reg(u32 val, s16 module, u16 idx)
+ /**
+  * prm_read_reset_sources - return the sources of the SoC's last reset
+  *
+  * Return a u32 bitmask representing the reset sources that caused the
+  * SoC to reset.  The low-level per-SoC functions called by this
+  * function remap the SoC-specific reset source bits into an
+  * OMAP-common set of reset source bits, defined in
+  * arch/arm/mach-omap2/prm.h.  Returns the standardized reset source
+  * u32 bitmask from the hardware upon success, or returns (1 <<
+  * OMAP_UNKNOWN_RST_SRC_ID_SHIFT) if no low-level read_reset_sources()
+  * function was registered.
+  */
+ u32 prm_read_reset_sources(void)
  {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- }
+ 	u32 ret = 1 << OMAP_UNKNOWN_RST_SRC_ID_SHIFT;
  
- u32 __weak omap2_prm_rmw_mod_reg_bits(u32 mask, u32 bits,
- 		s16 module, s16 idx)
- {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
- }
+ 	if (prm_ll_data->read_reset_sources)
+ 		ret = prm_ll_data->read_reset_sources();
+ 	else
+ 		WARN_ONCE(1, "prm: %s: no mapping function defined for reset sources\n", __func__);
  
- u32 __weak omap2_prm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
- {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
+ 	return ret;
  }
  
- u32 __weak omap2_prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx)
+ /**
+  * prm_register - register per-SoC low-level data with the PRM
+  * @pld: low-level per-SoC OMAP PRM data & function pointers to register
+  *
+  * Register per-SoC low-level OMAP PRM data and function pointers with
+  * the OMAP PRM common interface.  The caller must keep the data
+  * pointed to by @pld valid until it calls prm_unregister() and
+  * it returns successfully.  Returns 0 upon success, -EINVAL if @pld
+  * is NULL, or -EEXIST if prm_register() has already been called
+  * without an intervening prm_unregister().
+  */
+ int prm_register(struct prm_ll_data *pld)
  {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
- }
+ 	if (!pld)
+ 		return -EINVAL;
  
- u32 __weak omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask)
- {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
- }
+ 	if (prm_ll_data != &null_prm_ll_data)
+ 		return -EEXIST;
  
- int __weak omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
- {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
- 	return 0;
- }
+ 	prm_ll_data = pld;
  
- int __weak omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
- {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
  	return 0;
  }
  
- int __weak omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift,
- 						u8 st_shift)
+ /**
+  * prm_unregister - unregister per-SoC low-level data & function pointers
+  * @pld: low-level per-SoC OMAP PRM data & function pointers to unregister
+  *
+  * Unregister per-SoC low-level OMAP PRM data and function pointers
+  * that were previously registered with prm_register().  The
+  * caller may not destroy any of the data pointed to by @pld until
+  * this function returns successfully.  Returns 0 upon success, or
+  * -EINVAL if @pld is NULL or if @pld does not match the struct
+  * prm_ll_data * previously registered by prm_register().
+  */
+ int prm_unregister(struct prm_ll_data *pld)
  {
- 	WARN(1, "prm: omap2xxx/omap3xxx specific function called on non-omap2xxx/3xxx\n");
+ 	if (!pld || prm_ll_data != pld)
+ 		return -EINVAL;
+ 
+ 	prm_ll_data = &null_prm_ll_data;
+ 
  	return 0;
  }
- 
diff --combined arch/arm/mach-omap2/sdrc.c
index c64ee1904be8,3ed0d62333c5..dae7e4804a48
--- a/arch/arm/mach-omap2/sdrc.c
+++ b/arch/arm/mach-omap2/sdrc.c
@@@ -23,6 -23,8 +23,6 @@@
  #include <linux/clk.h>
  #include <linux/io.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "common.h"
  #include "clock.h"
  #include "sdrc.h"
@@@ -112,12 -114,10 +112,10 @@@ int omap2_sdrc_get_params(unsigned lon
  }
  
  
- void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
+ void __init omap2_set_globals_sdrc(void __iomem *sdrc, void __iomem *sms)
  {
- 	if (omap2_globals->sdrc)
- 		omap2_sdrc_base = omap2_globals->sdrc;
- 	if (omap2_globals->sms)
- 		omap2_sms_base = omap2_globals->sms;
+ 	omap2_sdrc_base = sdrc;
+ 	omap2_sms_base = sms;
  }
  
  /**
diff --combined arch/arm/mach-omap2/sdrc2xxx.c
index 20cc950db4de,26c1728e09ca..907291714643
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@@ -24,13 -24,14 +24,13 @@@
  #include <linux/clk.h>
  #include <linux/io.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "soc.h"
  #include "iomap.h"
  #include "common.h"
- #include "prm2xxx_3xxx.h"
+ #include "prm2xxx.h"
  #include "clock.h"
  #include "sdrc.h"
 +#include "sram.h"
  
  /* Memory timing, DLL mode flags */
  #define M_DDR		1
diff --combined arch/arm/mach-omap2/sleep34xx.S
index 7046c3c67181,474dba7263e3..d1dedc8195ed
--- a/arch/arm/mach-omap2/sleep34xx.S
+++ b/arch/arm/mach-omap2/sleep34xx.S
@@@ -26,12 -26,13 +26,12 @@@
  
  #include <asm/assembler.h>
  
 -#include "../plat-omap/sram.h"
 -
  #include "omap34xx.h"
  #include "iomap.h"
- #include "cm2xxx_3xxx.h"
- #include "prm2xxx_3xxx.h"
+ #include "cm3xxx.h"
+ #include "prm3xxx.h"
  #include "sdrc.h"
 +#include "sram.h"
  #include "control.h"
  
  /*