From: Adam Nemet <anemet@apple.com>
Date: Wed, 1 Oct 2014 00:41:32 +0000 (+0000)
Subject: [AVX512] Remove space before \t in AsmStrings.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=d0d5b08fbd68e725996734352bf427eba61c4352;p=oota-llvm.git

[AVX512] Remove space before \t in AsmStrings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218725 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrAVX512.td b/lib/Target/X86/X86InstrAVX512.td
index 7383ae09145..4ab1b2994ce 100644
--- a/lib/Target/X86/X86InstrAVX512.td
+++ b/lib/Target/X86/X86InstrAVX512.td
@@ -125,15 +125,15 @@ multiclass AVX512_masking_common<bits<8> O, Format F, X86VectorVTInfo _,
                                  dag RHS, dag MaskingRHS,
                                  string MaskingConstraint = ""> {
   def NAME: AVX512<O, F, Outs, Ins,
-                       OpcodeStr#" \t{"#AttSrcAsm#", $dst|"#
-                                      "$dst, "#IntelSrcAsm#"}",
+                       OpcodeStr#"\t{"#AttSrcAsm#", $dst|"#
+                                     "$dst, "#IntelSrcAsm#"}",
                        [(set _.RC:$dst, RHS)]>;
 
   // Prefer over VMOV*rrk Pat<>
   let AddedComplexity = 20 in
     def NAME#k: AVX512<O, F, Outs, MaskingIns,
-                       OpcodeStr#" \t{"#AttSrcAsm#", $dst {${mask}}|"#
-                                      "$dst {${mask}}, "#IntelSrcAsm#"}",
+                       OpcodeStr#"\t{"#AttSrcAsm#", $dst {${mask}}|"#
+                                     "$dst {${mask}}, "#IntelSrcAsm#"}",
                        [(set _.RC:$dst, MaskingRHS)]>,
               EVEX_K {
       // In case of the 3src subclass this is overridden with a let.
@@ -141,8 +141,8 @@ multiclass AVX512_masking_common<bits<8> O, Format F, X86VectorVTInfo _,
   }
   let AddedComplexity = 30 in // Prefer over VMOV*rrkz Pat<>
     def NAME#kz: AVX512<O, F, Outs, ZeroMaskingIns,
-                       OpcodeStr#" \t{"#AttSrcAsm#", $dst {${mask}} {z}|"#
-                                      "$dst {${mask}} {z}, "#IntelSrcAsm#"}",
+                       OpcodeStr#"\t{"#AttSrcAsm#", $dst {${mask}} {z}|"#
+                                     "$dst {${mask}} {z}, "#IntelSrcAsm#"}",
                        [(set _.RC:$dst,
                              (vselect _.KRCWM:$mask, RHS,
                                       (_.VT (bitconvert