From: Misha Brukman Date: Wed, 30 Jun 2004 22:11:03 +0000 (+0000) Subject: Fix indentation to be 2 spaces. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=d2d5df207a60f4ad74fcf5f9485b92e84d3da9bf;p=oota-llvm.git Fix indentation to be 2 spaces. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14512 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Sparc/InstSelectSimple.cpp b/lib/Target/Sparc/InstSelectSimple.cpp index 3ad9aa70bb3..20a27d3f193 100644 --- a/lib/Target/Sparc/InstSelectSimple.cpp +++ b/lib/Target/Sparc/InstSelectSimple.cpp @@ -945,14 +945,14 @@ void V8ISel::visitSetCondInst(SetCondInst &I) { case Instruction::SetGE: BranchIdx = 5; break; } static unsigned OpcodeTab[12] = { - // LLVM SparcV8 - // unsigned signed - V8::BE, V8::BE, // seteq = be be - V8::BNE, V8::BNE, // setne = bne bne - V8::BCS, V8::BL, // setlt = bcs bl - V8::BGU, V8::BG, // setgt = bgu bg - V8::BLEU, V8::BLE, // setle = bleu ble - V8::BCC, V8::BGE // setge = bcc bge + // LLVM SparcV8 + // unsigned signed + V8::BE, V8::BE, // seteq = be be + V8::BNE, V8::BNE, // setne = bne bne + V8::BCS, V8::BL, // setlt = bcs bl + V8::BGU, V8::BG, // setgt = bgu bg + V8::BLEU, V8::BLE, // setle = bleu ble + V8::BCC, V8::BGE // setge = bcc bge }; unsigned Opcode = OpcodeTab[2*BranchIdx + (Ty->isSigned() ? 1 : 0)]; diff --git a/lib/Target/Sparc/SparcV8ISelSimple.cpp b/lib/Target/Sparc/SparcV8ISelSimple.cpp index 3ad9aa70bb3..20a27d3f193 100644 --- a/lib/Target/Sparc/SparcV8ISelSimple.cpp +++ b/lib/Target/Sparc/SparcV8ISelSimple.cpp @@ -945,14 +945,14 @@ void V8ISel::visitSetCondInst(SetCondInst &I) { case Instruction::SetGE: BranchIdx = 5; break; } static unsigned OpcodeTab[12] = { - // LLVM SparcV8 - // unsigned signed - V8::BE, V8::BE, // seteq = be be - V8::BNE, V8::BNE, // setne = bne bne - V8::BCS, V8::BL, // setlt = bcs bl - V8::BGU, V8::BG, // setgt = bgu bg - V8::BLEU, V8::BLE, // setle = bleu ble - V8::BCC, V8::BGE // setge = bcc bge + // LLVM SparcV8 + // unsigned signed + V8::BE, V8::BE, // seteq = be be + V8::BNE, V8::BNE, // setne = bne bne + V8::BCS, V8::BL, // setlt = bcs bl + V8::BGU, V8::BG, // setgt = bgu bg + V8::BLEU, V8::BLE, // setle = bleu ble + V8::BCC, V8::BGE // setge = bcc bge }; unsigned Opcode = OpcodeTab[2*BranchIdx + (Ty->isSigned() ? 1 : 0)]; diff --git a/lib/Target/SparcV8/InstSelectSimple.cpp b/lib/Target/SparcV8/InstSelectSimple.cpp index 3ad9aa70bb3..20a27d3f193 100644 --- a/lib/Target/SparcV8/InstSelectSimple.cpp +++ b/lib/Target/SparcV8/InstSelectSimple.cpp @@ -945,14 +945,14 @@ void V8ISel::visitSetCondInst(SetCondInst &I) { case Instruction::SetGE: BranchIdx = 5; break; } static unsigned OpcodeTab[12] = { - // LLVM SparcV8 - // unsigned signed - V8::BE, V8::BE, // seteq = be be - V8::BNE, V8::BNE, // setne = bne bne - V8::BCS, V8::BL, // setlt = bcs bl - V8::BGU, V8::BG, // setgt = bgu bg - V8::BLEU, V8::BLE, // setle = bleu ble - V8::BCC, V8::BGE // setge = bcc bge + // LLVM SparcV8 + // unsigned signed + V8::BE, V8::BE, // seteq = be be + V8::BNE, V8::BNE, // setne = bne bne + V8::BCS, V8::BL, // setlt = bcs bl + V8::BGU, V8::BG, // setgt = bgu bg + V8::BLEU, V8::BLE, // setle = bleu ble + V8::BCC, V8::BGE // setge = bcc bge }; unsigned Opcode = OpcodeTab[2*BranchIdx + (Ty->isSigned() ? 1 : 0)]; diff --git a/lib/Target/SparcV8/SparcV8ISelSimple.cpp b/lib/Target/SparcV8/SparcV8ISelSimple.cpp index 3ad9aa70bb3..20a27d3f193 100644 --- a/lib/Target/SparcV8/SparcV8ISelSimple.cpp +++ b/lib/Target/SparcV8/SparcV8ISelSimple.cpp @@ -945,14 +945,14 @@ void V8ISel::visitSetCondInst(SetCondInst &I) { case Instruction::SetGE: BranchIdx = 5; break; } static unsigned OpcodeTab[12] = { - // LLVM SparcV8 - // unsigned signed - V8::BE, V8::BE, // seteq = be be - V8::BNE, V8::BNE, // setne = bne bne - V8::BCS, V8::BL, // setlt = bcs bl - V8::BGU, V8::BG, // setgt = bgu bg - V8::BLEU, V8::BLE, // setle = bleu ble - V8::BCC, V8::BGE // setge = bcc bge + // LLVM SparcV8 + // unsigned signed + V8::BE, V8::BE, // seteq = be be + V8::BNE, V8::BNE, // setne = bne bne + V8::BCS, V8::BL, // setlt = bcs bl + V8::BGU, V8::BG, // setgt = bgu bg + V8::BLEU, V8::BLE, // setle = bleu ble + V8::BCC, V8::BGE // setge = bcc bge }; unsigned Opcode = OpcodeTab[2*BranchIdx + (Ty->isSigned() ? 1 : 0)];