From: Jim Grosbach Date: Tue, 13 Sep 2011 20:35:57 +0000 (+0000) Subject: There's only 16 regs legal in a register list. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=d7a2b3bea8e8e4965cd7654f3a7537aba6ad7870;p=oota-llvm.git There's only 16 regs legal in a register list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139637 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 08a42f12483..8e674e81d2a 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1885,7 +1885,7 @@ parseRegisterList(SmallVectorImpl &Operands) { // Read the rest of the registers in the list. unsigned PrevRegNum = 0; - SmallVector, 32> Registers; + SmallVector, 16> Registers; do { bool IsRange = Parser.getTok().is(AsmToken::Minus);