From: lyx Date: Wed, 13 Oct 2010 08:22:40 +0000 (-0700) Subject: 补充提交：上次提交漏掉了rahosdk的相关文件 X-Git-Tag: firefly_0821_release~11061 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=d883c99dbabba4519210117b5933fe66a7ac8be1;p=firefly-linux-kernel-4.4.55.git 补充提交：上次提交漏掉了rahosdk的相关文件 --- diff --git a/arch/arm/configs/rk2818_rahosdk_defconfig b/arch/arm/configs/rk2818_rahosdk_defconfig new file mode 100755 index 000000000000..26ffbe72b997 --- /dev/null +++ b/arch/arm/configs/rk2818_rahosdk_defconfig @@ -0,0 +1,1744 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.32.9 +# Sun Sep 5 00:43:03 2010 +# +CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_HAVE_TCM=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_ARCH_HAS_CPUFREQ=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" +CONFIG_CONSTRUCTORS=y + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_LOCK_KERNEL=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +# CONFIG_SYSVIPC is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_TREE_RCU=y +# CONFIG_TREE_PREEMPT_RCU is not set +# CONFIG_RCU_TRACE is not set +CONFIG_RCU_FANOUT=32 +# CONFIG_RCU_FANOUT_EXACT is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=17 +CONFIG_GROUP_SCHED=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +# CONFIG_USER_SCHED is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +# CONFIG_CGROUP_NS is not set +CONFIG_CGROUP_FREEZER=y +# CONFIG_CGROUP_DEVICE is not set +# CONFIG_CPUSETS is not set +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +# CONFIG_CGROUP_MEM_RES_CTLR is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_RD_GZIP=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_EMBEDDED=y +CONFIG_UID16=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +# CONFIG_ELF_CORE is not set +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_ASHMEM=y +CONFIG_AIO=y + +# +# Kernel Performance Events And Counters +# +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_COMPAT_BRK=y +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_KPROBES is not set +CONFIG_HAVE_KPROBES=y +CONFIG_HAVE_KRETPROBES=y +CONFIG_HAVE_CLK=y + +# +# GCOV-based kernel profiling +# +# CONFIG_SLOW_WORK is not set +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBDAF is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +CONFIG_IOSCHED_CFQ=y +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +CONFIG_DEFAULT_CFQ=y +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_FREEZER=y + +# +# System Type +# +CONFIG_MMU=y +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_GEMINI is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_STMP3XXX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_NOMADIK is not set +# CONFIG_ARCH_IOP13XX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_KIRKWOOD is not set +# CONFIG_ARCH_LOKI is not set +# CONFIG_ARCH_MV78XX0 is not set +# CONFIG_ARCH_ORION5X is not set +# CONFIG_ARCH_MMP is not set +# CONFIG_ARCH_KS8695 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_PNX4008 is not set +# CONFIG_ARCH_PXA is not set +# CONFIG_ARCH_MSM is not set +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_S3C64XX is not set +# CONFIG_ARCH_S5PC1XX is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_U300 is not set +# CONFIG_ARCH_DAVINCI is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_BCMRING is not set +CONFIG_ARCH_RK2818=y + +# +# ROCKCHIP rk2818 Board Type +# +# CONFIG_MACH_RK2818MID is not set +# CONFIG_MACH_RK2818PHONE is not set +CONFIG_MACH_RAHOSDK=y +# CONFIG_MACH_RK2818INFO is not set +CONFIG_RK28_GPIO_IRQ=16 +CONFIG_RK28_ADC=y +CONFIG_RK28_USB_WAKE=y +CONFIG_WIFI_CONTROL_FUNC=y +CONFIG_RK2818_SOC_PM=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_ARM926T=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5TJ=y +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_COPY_V4WB=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y + +# +# Processor Features +# +CONFIG_ARM_THUMB=y +# CONFIG_CPU_ICACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_COMMON_CLKDEV=y + +# +# Bus support +# +# CONFIG_PCI_SYSCALL is not set +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCCARD is not set + +# +# Kernel Features +# +CONFIG_TICK_ONESHOT=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +CONFIG_VMSPLIT_3G=y +# CONFIG_VMSPLIT_2G is not set +# CONFIG_VMSPLIT_1G is not set +CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_PREEMPT_NONE is not set +# CONFIG_PREEMPT_VOLUNTARY is not set +CONFIG_PREEMPT=y +CONFIG_HZ=100 +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_HIGHMEM is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +CONFIG_HAVE_MLOCK=y +CONFIG_HAVE_MLOCKED_PAGE_BIT=y +# CONFIG_KSM is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_UACCESS_WITH_MEMCPY is not set + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_CMDLINE="mem=128M console=ttyS1,115200n8" +# CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set + +# +# CPU Power Management +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +# CONFIG_CPU_IDLE is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +# CONFIG_VFP is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +CONFIG_HAVE_AOUT=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set + +# +# Power management options +# +CONFIG_PM=y +# CONFIG_PM_DEBUG is not set +CONFIG_PM_SLEEP=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_HAS_WAKELOCK=y +CONFIG_HAS_EARLYSUSPEND=y +CONFIG_WAKELOCK=y +CONFIG_WAKELOCK_STAT=y +CONFIG_USER_WAKELOCK=y +CONFIG_EARLYSUSPEND=y +# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set +CONFIG_CONSOLE_EARLYSUSPEND=y +# CONFIG_FB_EARLYSUSPEND is not set +# CONFIG_APM_EMULATION is not set +# CONFIG_PM_RUNTIME is not set +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set +# CONFIG_XFRM_STATISTICS is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +CONFIG_ANDROID_PARANOID_NETWORK=y +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_RDS is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_PHONET is not set +# CONFIG_IEEE802154 is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +# CONFIG_BT_BNEP_MC_FILTER is not set +# CONFIG_BT_BNEP_PROTO_FILTER is not set +CONFIG_BT_HIDP=y + +# +# Bluetooth device drivers +# +# CONFIG_BT_HCIBTSDIO is not set +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +# CONFIG_BT_HCIUART_BCSP is not set +# CONFIG_BT_HCIUART_LL is not set +# CONFIG_BT_HCIVHCI is not set +# CONFIG_BT_MRVL is not set +# CONFIG_BT_HCIBCM4325 is not set +# CONFIG_AF_RXRPC is not set +CONFIG_WIRELESS=y +# CONFIG_CFG80211 is not set +CONFIG_CFG80211_DEFAULT_PS_VALUE=0 +# CONFIG_WIRELESS_OLD_REGULATORY is not set +CONFIG_WIRELESS_EXT=y +CONFIG_WIRELESS_EXT_SYSFS=y +CONFIG_LIB80211=y +# CONFIG_LIB80211_DEBUG is not set + +# +# CFG80211 needs to be enabled for MAC80211 +# +# CONFIG_WIMAX is not set +CONFIG_RFKILL=y +CONFIG_RFKILL_PM=y +# CONFIG_RFKILL_INPUT is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="" +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_EXTRA_FIRMWARE="" +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_DEBUG_DEVRES is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SST25L is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +# CONFIG_MTD_NAND_GPIO is not set +# CONFIG_MTD_NAND_DISKONCHIP is not set +CONFIG_MTD_NAND_RK2818=y +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_MG_DISK is not set +CONFIG_MISC_DEVICES=y +CONFIG_ANDROID_PMEM=y +# CONFIG_ICS932S401 is not set +# CONFIG_ENCLOSURE_SERVICES is not set +# CONFIG_KERNEL_DEBUGGER_CORE is not set +# CONFIG_ISL29003 is not set +CONFIG_UID_STAT=y +# CONFIG_WL127X_RFKILL is not set +CONFIG_APANIC=y +CONFIG_APANIC_PLABEL="kpanic" +# CONFIG_C2PORT is not set + +# +# EEPROM support +# +# CONFIG_EEPROM_AT24 is not set +# CONFIG_EEPROM_AT25 is not set +# CONFIG_EEPROM_LEGACY is not set +# CONFIG_EEPROM_MAX6875 is not set +# CONFIG_EEPROM_93CX6 is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_PHYLIB is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_DM9000_USE_NAND_CONTROL is not set +# CONFIG_DM9000_USE_NOR_CONTROL is not set +# CONFIG_ENC28J60 is not set +# CONFIG_ETHOC is not set +# CONFIG_SMC911X is not set +# CONFIG_SMSC911X is not set +# CONFIG_DNET is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +# CONFIG_B44 is not set +# CONFIG_KS8842 is not set +# CONFIG_KS8851 is not set +# CONFIG_KS8851_MLL is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN=y +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +CONFIG_BCM4329=y +CONFIG_BCM4329_FW_PATH="/etc/firmware/fw_bcm4329.bin" +CONFIG_BCM4329_NVRAM_PATH="/etc/firmware/nvram_bcm4329_B23.txt" + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +CONFIG_PPP=y +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=y +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +# CONFIG_PPPOE is not set +# CONFIG_PPPOL2TP is not set +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +# CONFIG_SLIP is not set +CONFIG_SLHC=y +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=y + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set +CONFIG_INPUT_KEYRESET=y + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ADP5588 is not set +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_QT2160 is not set +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_GPIO is not set +# CONFIG_KEYBOARD_MATRIX is not set +# CONFIG_KEYBOARD_MAX7359 is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_SUNKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +CONFIG_KEYBOARD_RK28ADC=y +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +CONFIG_INPUT_TOUCHSCREEN=y +# CONFIG_TOUCHSCREEN_ADS7846 is not set +# CONFIG_TOUCHSCREEN_AD7877 is not set +# CONFIG_TOUCHSCREEN_XPT2046_SPI is not set +# CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI is not set +# CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI is not set +CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI=y +# CONFIG_TOUCHSCREEN_IT7250 is not set +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set +# CONFIG_TOUCHSCREEN_AD7879 is not set +# CONFIG_TOUCHSCREEN_EETI is not set +# CONFIG_TOUCHSCREEN_FUJITSU is not set +# CONFIG_TOUCHSCREEN_GUNZE is not set +# CONFIG_TOUCHSCREEN_ELO is not set +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set +# CONFIG_TOUCHSCREEN_MCS5000 is not set +# CONFIG_TOUCHSCREEN_MTOUCH is not set +# CONFIG_TOUCHSCREEN_INEXIO is not set +# CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set +# CONFIG_TOUCHSCREEN_TSC2007 is not set +# CONFIG_TOUCHSCREEN_W90X900 is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_LPSENSOR_CM3602=y +# CONFIG_INPUT_ATI_REMOTE is not set +# CONFIG_INPUT_ATI_REMOTE2 is not set +CONFIG_INPUT_KEYCHORD=y +# CONFIG_INPUT_KEYSPAN_REMOTE is not set +# CONFIG_INPUT_POWERMATE is not set +# CONFIG_INPUT_YEALINK is not set +# CONFIG_INPUT_CM109 is not set +CONFIG_INPUT_UINPUT=y +# CONFIG_INPUT_GPIO is not set +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set +CONFIG_G_SENSOR_DEVICE=y +CONFIG_GS_MMA7660=y + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +CONFIG_DEVMEM=y +CONFIG_DEVKMEM=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_MAX3100 is not set +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_RK2818=y +CONFIG_UART0_RK2818=y +CONFIG_UART1_RK2818=y +CONFIG_SERIAL_RK2818_CONSOLE=y +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +# CONFIG_DCC_TTY is not set +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +# CONFIG_I2C_CHARDEV is not set +CONFIG_I2C_HELPER_AUTO=y + +# +# I2C Hardware Bus support +# +CONFIG_I2C_RK2818=y + +# +# Now, there are two I2C interfaces selected by developer, I2C0 and I2C1. +# +CONFIG_I2C0_RK2818=y +CONFIG_I2C1_RK2818=y + +# +# Miscellaneous I2C Chip support +# +# CONFIG_DS1682 is not set +# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_SENSORS_PCA963X is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPIM_RK2818=y + +# +# SPI Protocol Masters +# +# CONFIG_SPI_SPIDEV is not set +# CONFIG_SPI_TLE62X0 is not set +CONFIG_SPI_FPGA=y +CONFIG_SPI_FPGA_INIT=y +# CONFIG_SPI_FPGA_INIT_DEBUG is not set +CONFIG_SPI_FPGA_UART=y +# CONFIG_SPI_UART_DEBUG is not set +CONFIG_SPI_FPGA_GPIO=y +# CONFIG_SPI_GPIO_DEBUG is not set +CONFIG_SPI_FPGA_I2C=y +# CONFIG_SPI_I2C_DEBUG is not set +CONFIG_SPI_FPGA_DPRAM=y +# CONFIG_SPI_DPRAM_DEBUG is not set +CONFIG_SPI_FPGA_FW=y +CONFIG_HEADSET_DET=y + +# +# PPS support +# +# CONFIG_PPS is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_DEBUG_GPIO is not set +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# +# CONFIG_GPIO_MAX732X is not set +# CONFIG_GPIO_PCA953X is not set +# CONFIG_GPIO_PCF857X is not set + +# +# PCI GPIO expanders: +# + +# +# SPI GPIO expanders: +# +# CONFIG_GPIO_MAX7301 is not set +# CONFIG_GPIO_MCP23S08 is not set +# CONFIG_GPIO_MC33880 is not set + +# +# AC97 GPIO expanders: +# +# CONFIG_GPIO_PCA9554 is not set +# CONFIG_IOEXTEND_TCA6424 is not set +CONFIG_EXPANDED_GPIO_NUM=96 +CONFIG_EXPANDED_GPIO_IRQ_NUM=16 +# CONFIG_EXPAND_GPIO_SOFT_INTERRUPT is not set +CONFIG_SPI_FPGA_GPIO_NUM=96 +CONFIG_SPI_FPGA_GPIO_IRQ_NUM=16 +# CONFIG_W1 is not set +CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set +# CONFIG_PDA_POWER is not set +# CONFIG_BATTERY_DS2760 is not set +# CONFIG_BATTERY_DS2782 is not set +# CONFIG_BATTERY_BQ27x00 is not set +# CONFIG_BATTERY_MAX17040 is not set +CONFIG_BATTERY_RK2818=y +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_MFD_ASIC3 is not set +# CONFIG_HTC_EGPIO is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_TPS65010 is not set +# CONFIG_TWL4030_CORE is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_MFD_T7L66XB is not set +# CONFIG_MFD_TC6387XB is not set +# CONFIG_MFD_TC6393XB is not set +# CONFIG_PMIC_DA903X is not set +# CONFIG_MFD_WM8400 is not set +# CONFIG_MFD_WM831X is not set +# CONFIG_MFD_WM8350_I2C is not set +# CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_MC13783 is not set +# CONFIG_AB3100_CORE is not set +# CONFIG_EZX_PCAP is not set +CONFIG_REGULATOR=y +CONFIG_REGULATOR_DEBUG=y +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set +# CONFIG_REGULATOR_MAX1586 is not set +# CONFIG_REGULATOR_LP3971 is not set +# CONFIG_REGULATOR_TPS65023 is not set +# CONFIG_REGULATOR_TPS6507X is not set +CONFIG_RK2818_REGULATOR_CHARGE=y +CONFIG_RK2818_REGULATOR_LP8725=y +CONFIG_MEDIA_SUPPORT=y + +# +# Multimedia core support +# +CONFIG_VIDEO_DEV=y +CONFIG_VIDEO_V4L2_COMMON=y +CONFIG_VIDEO_ALLOW_V4L1=y +CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_DVB_CORE is not set +CONFIG_VIDEO_MEDIA=y + +# +# Multimedia drivers +# +# CONFIG_MEDIA_ATTACH is not set +CONFIG_MEDIA_TUNER=y +# CONFIG_MEDIA_TUNER_CUSTOMISE is not set +CONFIG_MEDIA_TUNER_SIMPLE=y +CONFIG_MEDIA_TUNER_TDA8290=y +CONFIG_MEDIA_TUNER_TDA9887=y +CONFIG_MEDIA_TUNER_TEA5761=y +CONFIG_MEDIA_TUNER_TEA5767=y +CONFIG_MEDIA_TUNER_MT20XX=y +CONFIG_MEDIA_TUNER_XC2028=y +CONFIG_MEDIA_TUNER_XC5000=y +CONFIG_MEDIA_TUNER_MC44S803=y +CONFIG_VIDEO_V4L2=y +CONFIG_VIDEO_V4L1=y +CONFIG_VIDEOBUF_GEN=y +CONFIG_VIDEOBUF_DMA_CONTIG=y +CONFIG_VIDEO_CAPTURE_DRIVERS=y +# CONFIG_VIDEO_ADV_DEBUG is not set +# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set +CONFIG_VIDEO_HELPER_CHIPS_AUTO=y +# CONFIG_VIDEO_VIVI is not set +# CONFIG_VIDEO_CPIA is not set +# CONFIG_VIDEO_SAA5246A is not set +# CONFIG_VIDEO_SAA5249 is not set +CONFIG_SOC_CAMERA=y +# CONFIG_SOC_CAMERA_MT9M001 is not set +# CONFIG_SOC_CAMERA_MT9M111 is not set +# CONFIG_SOC_CAMERA_MT9T031 is not set +# CONFIG_SOC_CAMERA_MT9V022 is not set +# CONFIG_SOC_CAMERA_TW9910 is not set +# CONFIG_SOC_CAMERA_PLATFORM is not set +# CONFIG_SOC_CAMERA_OV772X is not set +CONFIG_SOC_CAMERA_OV2655=y +# CONFIG_SOC_CAMERA_OV3640 is not set +# CONFIG_SOC_CAMERA_OV5642 is not set +# CONFIG_VIDEO_SH_MOBILE_CEU is not set +CONFIG_VIDEO_RK2818=y +CONFIG_RADIO_ADAPTERS=y +# CONFIG_I2C_SI4713 is not set +# CONFIG_RADIO_SI4713 is not set +# CONFIG_RADIO_SI470X is not set +# CONFIG_RADIO_TEA5764 is not set +CONFIG_SMS_SIANO_MDTV=m +# CONFIG_SMS_USB_DRV is not set +# CONFIG_SMS_SDIO_DRV is not set +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_VGASTATE is not set +CONFIG_VIDEO_OUTPUT_CONTROL=y +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +# CONFIG_FB_BOOT_VESA_SUPPORT is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set +# CONFIG_FB_FOREIGN_ENDIAN is not set +# CONFIG_FB_SYS_FOPS is not set +# CONFIG_FB_SVGALIB is not set +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_BACKLIGHT is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_RK2818=y +# CONFIG_FB_VIRTUAL is not set +# CONFIG_FB_METRONOME is not set +# CONFIG_FB_MB862XX is not set +# CONFIG_FB_BROADSHEET is not set +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_BACKLIGHT_RK2818_BL=y + +# +# Display device support +# +CONFIG_DISPLAY_SUPPORT=y + +# +# Display hardware drivers +# +# CONFIG_LCD_NULL is not set +# CONFIG_LCD_TD043MGEA1 is not set +CONFIG_LCD_HX8357=y +# CONFIG_LCD_TJ048NC01CA is not set +# CONFIG_LCD_HL070VM4AU is not set +# CONFIG_LCD_HSD070IDW1 is not set +# CONFIG_LCD_A060SE02 is not set +# CONFIG_LCD_S1D13521 is not set +# CONFIG_LCD_NT35582 is not set +# CONFIG_LCD_NT35580 is not set +CONFIG_TV_NULL=y +CONFIG_HDMI_NULL=y +# CONFIG_HDMI_ANX7150 is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FONTS=y +# CONFIG_FONT_8x8 is not set +CONFIG_FONT_8x16=y +# CONFIG_FONT_6x11 is not set +# CONFIG_FONT_7x14 is not set +# CONFIG_FONT_PEARL_8x8 is not set +# CONFIG_FONT_ACORN_8x8 is not set +# CONFIG_FONT_MINI_4x6 is not set +# CONFIG_FONT_SUN8x16 is not set +# CONFIG_FONT_SUN12x22 is not set +# CONFIG_FONT_10x18 is not set +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_SOUND=y +# CONFIG_SOUND_OSS_CORE is not set +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +CONFIG_SND_JACK=y +# CONFIG_SND_SEQUENCER is not set +# CONFIG_SND_MIXER_OSS is not set +# CONFIG_SND_PCM_OSS is not set +# CONFIG_SND_HRTIMER is not set +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set +# CONFIG_SND_RAWMIDI_SEQ is not set +# CONFIG_SND_OPL3_LIB_SEQ is not set +# CONFIG_SND_OPL4_LIB_SEQ is not set +# CONFIG_SND_SBAWE_SEQ is not set +# CONFIG_SND_EMU10K1_SEQ is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +# CONFIG_SND_SPI is not set +CONFIG_SND_SOC=y +CONFIG_SND_ROCKCHIP_SOC=y +CONFIG_SND_ROCKCHIP_SOC_I2S=y +# CONFIG_SND_ROCKCHIP_SOC_WM8988 is not set +CONFIG_SND_ROCKCHIP_SOC_WM8994=y +CONFIG_SND_INSIDE_EARPIECE=y +# CONFIG_SND_OUTSIDE_EARPIECE is not set +# CONFIG_SND_NO_EARPIECE is not set +# CONFIG_SND_BB_NORMAL_INPUT is not set +CONFIG_SND_BB_DIFFERENTIAL_INPUT=y +CONFIG_WM8994_SPEAKER_INCALL_VOL=15 +CONFIG_WM8994_SPEAKER_INCALL_MIC_VOL=15 +CONFIG_WM8994_SPEAKER_NORMAL_VOL=15 +CONFIG_WM8994_HEADSET_INCALL_VOL=-9 +CONFIG_WM8994_HEADSET_INCALL_MIC_VOL=-6 +CONFIG_WM8994_HEADSET_NORMAL_VOL=15 +CONFIG_WM8994_BT_INCALL_VOL=30 +CONFIG_WM8994_BT_INCALL_MIC_VOL=-30 +CONFIG_WM8994_RECORDER_VOL=20 +CONFIG_SND_CODEC_SOC_MASTER=y +# CONFIG_SND_CODEC_SOC_SLAVE is not set +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SOC_ALL_CODECS is not set +CONFIG_SND_SOC_WM8994=y +# CONFIG_SOUND_PRIME is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_HID=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +# CONFIG_USB_ARCH_HAS_OHCI is not set +# CONFIG_USB_ARCH_HAS_EHCI is not set +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set +# CONFIG_USB_MUSB_HDRC is not set +# CONFIG_USB_GADGET_MUSB_HDRC is not set + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_ATMEL_USBA is not set +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_PXA25X is not set +# CONFIG_USB_GADGET_R8A66597 is not set +# CONFIG_USB_GADGET_PXA27X is not set +# CONFIG_USB_GADGET_S3C_HSOTG is not set +# CONFIG_USB_GADGET_IMX is not set +# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_AMD5536UDC is not set +# CONFIG_USB_GADGET_FSL_QE is not set +# CONFIG_USB_GADGET_CI13XXX is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LANGWELL is not set +CONFIG_USB_GADGET_DWC_OTG=y +CONFIG_USB_DWC_OTG=y +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y +# CONFIG_USB_ZERO is not set +# CONFIG_USB_AUDIO is not set +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set +# CONFIG_USB_G_PRINTER is not set +CONFIG_USB_ANDROID=y +# CONFIG_USB_ANDROID_ACM is not set +# CONFIG_USB_ANDROID_ADB is not set +CONFIG_USB_ANDROID_MASS_STORAGE=y +CONFIG_USB_ANDROID_RNDIS=y +CONFIG_USB_ANDROID_RNDIS_WCEIS=y +# CONFIG_USB_CDC_COMPOSITE is not set + +# +# OTG and related infrastructure +# +# CONFIG_USB_GPIO_VBUS is not set +# CONFIG_NOP_USB_XCEIV is not set +# CONFIG_RK2818_HOST11 is not set +CONFIG_DWC_OTG=y +# CONFIG_DWC_OTG_DEBUG is not set +# CONFIG_DWC_OTG_HOST_ONLY is not set +CONFIG_DWC_OTG_DEVICE_ONLY=y +# CONFIG_DWC_OTG_BOTH_HOST_SLAVE is not set +# CONFIG_DWC_OTG_NORMAL_PREFERENCE is not set +# CONFIG_DWC_OTG_HOST_PREFERENCE is not set +CONFIG_DWC_OTG_DEVICE_PREFERENCE=y +CONFIG_MMC=y +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +CONFIG_MMC_EMBEDDED_SDIO=y +# CONFIG_MMC_PARANOID_SD_INIT is not set + +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_BOUNCE=y +CONFIG_MMC_BLOCK_DEFERRED_RESUME=y +# CONFIG_SDIO_UART is not set +# CONFIG_MMC_TEST is not set + +# +# MMC/SD/SDIO Host Controller Drivers +# +CONFIG_SDMMC_RK2818=y + +# +# Now, there are two SDMMC controllers selected, SDMMC0 and SDMMC1. +# +CONFIG_SDMMC0_RK2818=y +CONFIG_SDMMC1_RK2818=y +# CONFIG_MMC_SDHCI is not set +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +# CONFIG_MMC_SPI is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +CONFIG_SWITCH=y +CONFIG_SWITCH_GPIO=y +# CONFIG_ACCESSIBILITY is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set + +# +# RTC interfaces +# +# CONFIG_RTC_INTF_SYSFS is not set +# CONFIG_RTC_INTF_PROC is not set +# CONFIG_RTC_INTF_DEV is not set +CONFIG_RTC_INTF_ALARM=y +CONFIG_RTC_INTF_ALARM_DEV=y +# CONFIG_RTC_DRV_TEST is not set + +# +# I2C RTC drivers +# +# CONFIG_RTC_HYM8563 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set +# CONFIG_RTC_DRV_ISL1208 is not set +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set +# CONFIG_RTC_DRV_M41T80 is not set +# CONFIG_RTC_DRV_S35390A is not set +CONFIG_RTC_DRV_S35392A=y +# CONFIG_RTC_DRV_FM3130 is not set +# CONFIG_RTC_DRV_RX8581 is not set +# CONFIG_RTC_DRV_RX8025 is not set + +# +# SPI RTC drivers +# +# CONFIG_RTC_DRV_M41T94 is not set +# CONFIG_RTC_DRV_DS1305 is not set +# CONFIG_RTC_DRV_DS1390 is not set +# CONFIG_RTC_DRV_MAX6902 is not set +# CONFIG_RTC_DRV_R9701 is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_DS3234 is not set +# CONFIG_RTC_DRV_PCF2123 is not set + +# +# Platform RTC drivers +# +# CONFIG_RTC_DRV_CMOS is not set +# CONFIG_RTC_DRV_DS1286 is not set +# CONFIG_RTC_DRV_DS1511 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_M48T35 is not set +# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_BQ4802 is not set +# CONFIG_RTC_DRV_V3020 is not set + +# +# on-CPU RTC drivers +# +# CONFIG_DMADEVICES is not set +# CONFIG_AUXDISPLAY is not set +# CONFIG_UIO is not set + +# +# TI VLYNQ +# +CONFIG_STAGING=y +# CONFIG_STAGING_EXCLUDE_BUILD is not set +# CONFIG_ECHO is not set + +# +# Android +# +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_RAM_CONSOLE=y +CONFIG_ANDROID_RAM_CONSOLE_ENABLE_VERBOSE=y +CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION=y +CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_DATA_SIZE=128 +CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_ECC_SIZE=16 +CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_SYMBOL_SIZE=8 +CONFIG_ANDROID_RAM_CONSOLE_ERROR_CORRECTION_POLYNOMIAL=0x11d +# CONFIG_ANDROID_RAM_CONSOLE_EARLY_INIT is not set +CONFIG_ANDROID_TIMED_OUTPUT=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y + +# +# Qualcomm MSM Camera And Video +# + +# +# Camera Sensor Selection +# +# CONFIG_DST is not set +# CONFIG_POHMELFS is not set +# CONFIG_PLAN9AUTH is not set + +# +# RAR Register Driver +# +# CONFIG_RAR_REGISTER is not set +# CONFIG_IIO is not set + +# +# DSP +# +CONFIG_RK2818_DSP=y + +# +# RK1000 control +# +# CONFIG_RK1000_CONTROL is not set + +# +# rk2818 POWER CONTROL +# +CONFIG_RK2818_POWER=y + +# +# CMMB +# +CONFIG_CMMB=y + +# +# Siano module components +# +# CONFIG_SMS_DVB3_SUBSYS is not set +# CONFIG_SMS_DVB5_S2API_SUBSYS is not set +CONFIG_SMS_HOSTLIB_SUBSYS=y +# CONFIG_SMS_NET_SUBSYS is not set +CONFIG_SMS_SPI_ROCKCHIP=y + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +CONFIG_EXT2_FS_SECURITY=y +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set +CONFIG_EXT3_FS_XATTR=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4_FS is not set +CONFIG_JBD=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +# CONFIG_NILFS2_FS is not set +CONFIG_FILE_LOCKING=y +CONFIG_FSNOTIFY=y +# CONFIG_DNOTIFY is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# Caches +# +# CONFIG_FSCACHE is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +# CONFIG_MSDOS_FS is not set +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_YAFFS_FS=y +CONFIG_YAFFS_YAFFS1=y +# CONFIG_YAFFS_9BYTE_TAGS is not set +# CONFIG_YAFFS_DOES_ECC is not set +CONFIG_YAFFS_YAFFS2=y +CONFIG_YAFFS_AUTO_YAFFS2=y +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y +# CONFIG_YAFFS_EMPTY_LOST_AND_FOUND is not set +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=y +CONFIG_NFS_V4_1=y +CONFIG_ROOT_NFS=y +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_ACL_SUPPORT=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +CONFIG_SUNRPC_GSS=y +CONFIG_RPCSEC_GSS_KRB5=y +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +CONFIG_NLS_CODEPAGE_850=y +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +CONFIG_NLS_CODEPAGE_936=y +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +CONFIG_NLS_ISO8859_1=y +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +CONFIG_NLS_ISO8859_15=y +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +CONFIG_NLS_UTF8=y +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_WARN_DEPRECATED=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_FRAME_WARN=1024 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_STRIP_ASM_SYMS is not set +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_SHIRQ is not set +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +# CONFIG_DEBUG_OBJECTS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_KMEMLEAK is not set +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_LOCK_STAT is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_WRITECOUNT is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_DEBUG_LIST is not set +# CONFIG_DEBUG_SG is not set +# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_CREDENTIALS is not set +# CONFIG_BOOT_PRINTK_DELAY is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_BACKTRACE_SELF_TEST is not set +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set +# CONFIG_FAULT_INJECTION is not set +# CONFIG_LATENCYTOP is not set +# CONFIG_PAGE_POISONING is not set +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_TRACING_SUPPORT=y +# CONFIG_FTRACE is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +# CONFIG_KGDB is not set +CONFIG_ARM_UNWIND=y +# CONFIG_DEBUG_USER is not set +CONFIG_DEBUG_ERRORS=y +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_ALGAPI2=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_BLKCIPHER2=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_PCOMP=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +CONFIG_CRYPTO_WORKQUEUE=y +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set +# CONFIG_CRYPTO_VMAC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_GHASH is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +CONFIG_CRYPTO_SHA1=y +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_ZLIB is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +CONFIG_CRYPTO_HW=y +# CONFIG_BINARY_PRINTF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +CONFIG_CRC_CCITT=y +CONFIG_CRC16=y +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_REED_SOLOMON=y +CONFIG_REED_SOLOMON_ENC8=y +CONFIG_REED_SOLOMON_DEC8=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y +CONFIG_NLATTR=y diff --git a/arch/arm/mach-rk2818/board-raho-rfkill.c b/arch/arm/mach-rk2818/board-raho-rfkill.c index 82a2d31311e8..9182d47fb8fc 100755 --- a/arch/arm/mach-rk2818/board-raho-rfkill.c +++ b/arch/arm/mach-rk2818/board-raho-rfkill.c @@ -43,7 +43,7 @@ extern int raho_wifi_power_state; #ifdef CONFIG_BT_HCIBCM4325 int bcm4325_sleep(int bSleep) { - printk("*************bt enter sleep***************\n"); +// printk("*************bt enter sleep***************\n"); if (bSleep) gpio_set_value(RAHO_BT_GPIO_WAKE_UP_N, GPIO_LOW); //low represent bt device may enter sleep else diff --git a/arch/arm/mach-rk2818/board-rahosdk-rfkill.c b/arch/arm/mach-rk2818/board-rahosdk-rfkill.c new file mode 100755 index 000000000000..2b0001cfdb49 --- /dev/null +++ b/arch/arm/mach-rk2818/board-rahosdk-rfkill.c @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2010 ROCKCHIP, Inc. + * Author: roger_chen + * + * This program is the bluetooth device bcm4329's driver, + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +//#include +//#include +//#include +//#include +#include +#include +#include +#include +#include +#include + +#if 1 +#define DBG(x...) printk(KERN_INFO x) +#else +#define DBG(x...) +#endif + +#define RAHO_BT_GPIO_POWER_N FPGA_PIO1_06 +#define RAHO_BT_GPIO_RESET_N FPGA_PIO1_07 + +static struct rfkill *bt_rfk; +static const char bt_name[] = "bcm4329"; +extern int raho_bt_power_state; +extern int raho_wifi_power_state; + +static int bcm4329_set_block(void *data, bool blocked) +{ + DBG("%s---blocked :%d\n", __FUNCTION__, blocked); + + if (false == blocked) { + gpio_set_value(RAHO_BT_GPIO_POWER_N, GPIO_HIGH); /* bt power on */ + gpio_set_value(RAHO_BT_GPIO_RESET_N, GPIO_HIGH); /* bt reset deactive*/ + mdelay(20); + pr_info("bt turn on power\n"); + } + else { + if (!raho_wifi_power_state) { + gpio_set_value(RAHO_BT_GPIO_POWER_N, GPIO_LOW); /* bt power off */ + mdelay(20); + pr_info("bt shut off power\n"); + }else { + pr_info("bt shouldn't shut off power, wifi is using it!\n"); + } + + gpio_set_value(RAHO_BT_GPIO_RESET_N, GPIO_LOW); /* bt reset active*/ + mdelay(20); + } + + raho_bt_power_state = !blocked; + return 0; +} + + +static const struct rfkill_ops bcm4329_rfk_ops = { + .set_block = bcm4329_set_block, +}; + +static int __init bcm4329_rfkill_probe(struct platform_device *pdev) +{ + int rc = 0; + bool default_state = true; + + DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__); + + /* default to bluetooth off */ + bcm4329_set_block(NULL, default_state); /* blocked -> bt off */ + + bt_rfk = rfkill_alloc(bt_name, + NULL, + RFKILL_TYPE_BLUETOOTH, + &bcm4329_rfk_ops, + NULL); + + if (!bt_rfk) + { + printk("fail to rfkill_allocate************\n"); + return -ENOMEM; + } + + rfkill_set_states(bt_rfk, default_state, false); + + rc = rfkill_register(bt_rfk); + if (rc) + rfkill_destroy(bt_rfk); + + printk("rc=0x%x\n", rc); + + return rc; +} + + +static int __devexit bcm4329_rfkill_remove(struct platform_device *pdev) +{ + if (bt_rfk) + rfkill_unregister(bt_rfk); + bt_rfk = NULL; + + platform_set_drvdata(pdev, NULL); + DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__); + return 0; +} + +static struct platform_driver bcm4329_rfkill_driver = { + .probe = bcm4329_rfkill_probe, + .remove = __devexit_p(bcm4329_rfkill_remove), + .driver = { + .name = "raho_rfkill", + .owner = THIS_MODULE, + }, +}; + +/* + * Module initialization + */ +static int __init bcm4329_mod_init(void) +{ + int ret; + DBG("Enter::%s,line=%d\n",__FUNCTION__,__LINE__); + ret = platform_driver_register(&bcm4329_rfkill_driver); + printk("ret=0x%x\n", ret); + return ret; +} + +static void __exit bcm4329_mod_exit(void) +{ + platform_driver_unregister(&bcm4329_rfkill_driver); +} + +module_init(bcm4329_mod_init); +module_exit(bcm4329_mod_exit); +MODULE_DESCRIPTION("bcm4329 Bluetooth driver"); +MODULE_AUTHOR("roger_chen cz@rock-chips.com"); +MODULE_LICENSE("GPL"); + diff --git a/arch/arm/mach-rk2818/board-rahosdk.c b/arch/arm/mach-rk2818/board-rahosdk.c new file mode 100755 index 000000000000..ced91f7df2b9 --- /dev/null +++ b/arch/arm/mach-rk2818/board-rahosdk.c @@ -0,0 +1,2258 @@ +/* linux/arch/arm/mach-rk2818/board-phonesdk.c + * + * Copyright (C) 2010 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include /* ddl@rock-chips.com : camera support */ +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include /* ddl@rock-chips.com : camera support */ + + +#include "devices.h" + +#include "../../../drivers/spi/rk2818_spim.h" +#include +#include "../../../drivers/input/touchscreen/xpt2046_ts.h" +#include "../../../drivers/staging/android/timed_gpio.h" +#include "../../../sound/soc/codecs/wm8994.h" +#include "../../../drivers/headset_observe/rk2818_headset.h" +#include +#include + +#include "../../../drivers/cmmb/siano/smsspiphy.h" +/* -------------------------------------------------------------------- + * ÉùÃ÷ÁËrk2818_gpioBankÊý×飬²¢¶¨ÒåÁËGPIO¼Ä´æÆ÷×éIDºÍ¼Ä´æÆ÷»ùµØÖ·¡£ + * -------------------------------------------------------------------- */ + +static struct rk2818_gpio_bank rk2818_gpioBank[] = { + { + .id = RK2818_ID_PIOA, + .offset = RK2818_GPIO0_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOB, + .offset = RK2818_GPIO0_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOC, + .offset = RK2818_GPIO0_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOD, + .offset = RK2818_GPIO0_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOE, + .offset = RK2818_GPIO1_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOF, + .offset = RK2818_GPIO1_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOG, + .offset = RK2818_GPIO1_BASE, + .clock = NULL, + }, + { + .id = RK2818_ID_PIOH, + .offset = RK2818_GPIO1_BASE, + .clock = NULL, + } +}; + +//IOÓ³É䷽ʽÃèÊö £¬Ã¿¸öΪһ¶ÎÏßÐÔÁ¬ÐøÓ³Éä +static struct map_desc rk2818_io_desc[] __initdata = { + + { + .virtual = RK2818_MCDMA_BASE, //ÐéÄâµØÖ· + .pfn = __phys_to_pfn(RK2818_MCDMA_PHYS), //ÎïÀíµØÖ·£¬ÐëÓëÒ³±í¶ÔÆë + .length = RK2818_MCDMA_SIZE, //³¤¶È + .type = MT_DEVICE //Ó³É䷽ʽ + }, + + { + .virtual = RK2818_DWDMA_BASE, + .pfn = __phys_to_pfn(RK2818_DWDMA_PHYS), + .length = RK2818_DWDMA_SIZE, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_INTC_BASE, + .pfn = __phys_to_pfn(RK2818_INTC_PHYS), + .length = RK2818_INTC_SIZE, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_NANDC_BASE, + .pfn = __phys_to_pfn(RK2818_NANDC_PHYS), + .length = RK2818_NANDC_SIZE, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_SDRAMC_BASE, + .pfn = __phys_to_pfn(RK2818_SDRAMC_PHYS), + .length = RK2818_SDRAMC_SIZE, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_ARMDARBITER_BASE, + .pfn = __phys_to_pfn(RK2818_ARMDARBITER_PHYS), + .length = RK2818_ARMDARBITER_SIZE, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_APB_BASE, + .pfn = __phys_to_pfn(RK2818_APB_PHYS), + .length = 0xa0000, + .type = MT_DEVICE + }, + + { + .virtual = RK2818_WDT_BASE, + .pfn = __phys_to_pfn(RK2818_WDT_PHYS), + .length = 0xa0000, ///apb bus i2s i2c spi no map in this + .type = MT_DEVICE + }, +}; + +/***************************************************************************************** + * sd/mmc devices + * author: kfx@rock-chips.com +*****************************************************************************************/ +static int rk2818_sdmmc0_io_init(void) +{ + rk2818_mux_api_set(GPIOH_MMC0D_SEL_NAME, IOMUXA_SDMMC0_DATA123); + rk2818_mux_api_set(GPIOH_MMC0_SEL_NAME, IOMUXA_SDMMC0_CMD_DATA0_CLKOUT); + + return 0; +} + +static int rk2818_sdmmc1_io_init(void) +{ + rk2818_mux_api_set(GPIOG_MMC1_SEL_NAME, IOMUXA_SDMMC1_CMD_DATA0_CLKOUT); + rk2818_mux_api_set(GPIOG_MMC1D_SEL_NAME, IOMUXA_SDMMC1_DATA123); + + return 0; +} +#define CONFIG_SDMMC0_USE_DMA +#define CONFIG_SDMMC1_USE_DMA +struct rk2818_sdmmc_platform_data default_sdmmc0_data = { + .host_ocr_avail = (MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30| + MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33| + MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36), + .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED), + .io_init = rk2818_sdmmc0_io_init, + .no_detect = 0, + .dma_name = "sd_mmc", +#ifdef CONFIG_SDMMC0_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif +}; + +static int raho_wifi_status(struct device *dev); +static int raho_wifi_status_register(void (*callback)(int card_presend, void *dev_id), void *dev_id); +struct rk2818_sdmmc_platform_data default_sdmmc1_data = { + .host_ocr_avail = (MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29| + MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32| + MMC_VDD_32_33|MMC_VDD_33_34), + .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ| + MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED), + .io_init = rk2818_sdmmc1_io_init, + .no_detect = 1, + .dma_name = "sdio", +#ifdef CONFIG_SDMMC1_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + .status = raho_wifi_status, + .register_status_notify = raho_wifi_status_register, +}; + +static int raho_wifi_cd; /* wifi virtual 'card detect' status */ +static void (*wifi_status_cb)(int card_present, void *dev_id); +static void *wifi_status_cb_devid; + +static int raho_wifi_status(struct device *dev) +{ + return raho_wifi_cd; +} + +static int raho_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id) +{ + if(wifi_status_cb) + return -EAGAIN; + wifi_status_cb = callback; + wifi_status_cb_devid = dev_id; + return 0; +} + +#define RAHO_WIFI_GPIO_POWER_N FPGA_PIO1_06 +#define RAHO_WIFI_GPIO_RESET_N FPGA_PIO1_03 + +int raho_wifi_power_state = 0; +int raho_bt_power_state = 0; + +static int raho_wifi_power(int on) +{ + pr_info("%s: %d\n", __func__, on); + if (on){ + gpio_set_value(RAHO_WIFI_GPIO_POWER_N, on); + mdelay(100); + pr_info("wifi turn on power\n"); + }else{ + if (!raho_bt_power_state){ + gpio_set_value(RAHO_WIFI_GPIO_POWER_N, on); + mdelay(100); + pr_info("wifi shut off power\n"); + }else + { + pr_info("wifi shouldn't shut off power, bt is using it!\n"); + } + + } + + raho_wifi_power_state = on; + return 0; +} + +static int raho_wifi_reset_state; +static int raho_wifi_reset(int on) +{ + pr_info("%s: %d\n", __func__, on); + gpio_set_value(RAHO_WIFI_GPIO_RESET_N, on); + mdelay(100); + raho_wifi_reset_state = on; + return 0; +} + +static int raho_wifi_set_carddetect(int val) +{ + pr_info("%s:%d\n", __func__, val); + raho_wifi_cd = val; + if (wifi_status_cb){ + wifi_status_cb(val, wifi_status_cb_devid); + }else { + pr_warning("%s, nobody to notify\n", __func__); + } + return 0; +} + +static struct wifi_platform_data raho_wifi_control = { + .set_power = raho_wifi_power, + .set_reset = raho_wifi_reset, + .set_carddetect = raho_wifi_set_carddetect, +}; +static struct platform_device raho_wifi_device = { + .name = "bcm4329_wlan", + .id = 1, + .dev = { + .platform_data = &raho_wifi_control, + }, +}; + +/* bluetooth rfkill device */ +static struct platform_device raho_rfkill = { + .name = "raho_rfkill", + .id = -1, +}; + +/***************************************************************************************** + * extern gpio devices + * author: xxx@rock-chips.com + *****************************************************************************************/ +#if defined (CONFIG_GPIO_PCA9554) +struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = { + { + .gpio_num =RK2818_PIN_PI0, + .pin_type = GPIO_IN, + //.pin_value =GPIO_HIGH, + }, + + { + .gpio_num =RK2818_PIN_PI4,// tp3 + .pin_type = GPIO_IN, + //.pin_value =GPIO_HIGH, + }, + + { + .gpio_num =RK2818_PIN_PI5,//tp4 + .pin_type = GPIO_IN, + //.pin_value =GPIO_HIGH, + }, + { + .gpio_num =RK2818_PIN_PI6,//tp2 + .pin_type = GPIO_OUT, + //.pin_value =GPIO_HIGH, + }, + { + .gpio_num =RK2818_PIN_PI7,//tp1 + .pin_type = GPIO_OUT, + .pin_value =GPIO_HIGH, + }, + + + +}; + +struct pca9554_platform_data rk2818_pca9554_data={ + .gpio_base=GPIO_EXPANDER_BASE, + .gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM, + .gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP, + .irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM, + .pca9954_irq_pin=RK2818_PIN_PE2, + .settinginfo=extern_gpio_settinginfo, + .settinginfolen=ARRAY_SIZE(extern_gpio_settinginfo), +}; +#endif + +/***************************************************************************************** + *regulator devices drivers/regulator/rk2818_lp8725.c linux/regulator/rk2818_lp8725.h + *author: cym +*****************************************************************************************/ +#if defined (CONFIG_RK2818_REGULATOR_LP8725) + +/*DVS pin control, make sure it is high level at start.*/ +int rk2818_lp8725_pm_control(void) +{ + rk2818_mux_api_set(GPIOC_LCDC24BIT_SEL_NAME, IOMUXB_GPIO0_C2_7); + gpio_request(RK2818_PIN_PC2,NULL); + gpio_direction_output(RK2818_PIN_PC2,1); + gpio_set_value(RK2818_PIN_PC2,1); + return 0; +} + +/*ldo1 2V8OUT USB2.5V LCD_VCC*/ +static struct regulator_consumer_supply ldo1_consumers[] = { + { + .supply = "ldo1", + } +}; + +static struct regulator_init_data rk2818_lp8725_ldo1_data = { + .constraints = { + .name = "LDO1", + .min_uV = 1200000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(ldo1_consumers), + .consumer_supplies = ldo1_consumers, +}; + +/*ldo2 CAMERA_1V8 SD_CARD*/ +static struct regulator_consumer_supply ldo2_consumers[] = { + { + .supply = "ldo2", + } +}; + +static struct regulator_init_data rk2818_lp8725_ldo2_data = { + .constraints = { + .name = "LDO2", + .min_uV = 1200000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), + .consumer_supplies = ldo2_consumers, +}; + +/*ldo3 VCC_NAND WIFI/BT/FM_BCM4325*/ +static struct regulator_consumer_supply ldo3_consumers[] = { + { + .supply = "ldo3", + } +}; + +static struct regulator_init_data rk2818_lp8725_ldo3_data = { + .constraints = { + .name = "LDO3", + .min_uV = 1200000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers), + .consumer_supplies = ldo3_consumers, +}; + +/*ldo4 VCCA CODEC_WM8994*/ +static struct regulator_consumer_supply ldo4_consumers[] = { + { + .supply = "ldo4", + } +}; + +static struct regulator_init_data rk2818_lp8725_ldo4_data = { + .constraints = { + .name = "LDO4", + .min_uV = 1200000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(ldo4_consumers), + .consumer_supplies = ldo4_consumers, +}; + +/*ldo5 AVDD18 CODEC_WM8994*/ +static struct regulator_consumer_supply ldo5_consumers[] = { + { + .supply = "ldo5", + } +}; + +static struct regulator_init_data rk2818_lp8725_ldo5_data = { + .constraints = { + .name = "LDO5", + .min_uV = 1200000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers), + .consumer_supplies = ldo5_consumers, +}; + +/*lilo1 VCCIO Sensor£¨3M£©*/ +static struct regulator_consumer_supply lilo1_consumers[] = { + { + .supply = "lilo1", + } +}; + +static struct regulator_init_data rk2818_lp8725_lilo1_data = { + .constraints = { + .name = "LILO1", + .min_uV = 800000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(lilo1_consumers), + .consumer_supplies = lilo1_consumers +}; + +/*lilo2 VCC33_SD Sensor£¨3M£©*/ +static struct regulator_consumer_supply lilo2_consumers[] = { + { + .supply = "lilo2", + } +}; + +static struct regulator_init_data rk2818_lp8725_lilo2_data = { + .constraints = { + .name = "LILO2", + .min_uV = 800000, + .max_uV = 3300000, + .apply_uV = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(lilo2_consumers), + .consumer_supplies = lilo2_consumers +}; + +/*buck1 VDD12 Core*/ +static struct regulator_consumer_supply buck1_consumers[] = { + { + .supply = "vdd12", + } +}; + +static struct regulator_init_data rk2818_lp8725_buck1_data = { + .constraints = { + .name = "VDD12", + .min_uV = 800000, + .max_uV = 1500000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, + .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL, + }, + .num_consumer_supplies = ARRAY_SIZE(buck1_consumers), + .consumer_supplies = buck1_consumers +}; + +/*buck2 VDDDR MobileDDR VCC*/ +static struct regulator_consumer_supply buck2_consumers[] = { + { + .supply = "vccdr", + } +}; + +static struct regulator_init_data rk2818_lp8725_buck2_data = { + .constraints = { + .name = "VCCDR", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + .always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(buck2_consumers), + .consumer_supplies = buck2_consumers +}; + +/*buck1_v2 VDD12 Core*/ +static struct regulator_consumer_supply buck1_v2_consumers[] = { + { + .supply = "vdd12_v2", + } +}; + +static struct regulator_init_data rk2818_lp8725_buck1_v2_data = { + .constraints = { + .name = "VDD12_V2", + .min_uV = 800000, + .max_uV = 1500000, + .apply_uV = 1, + //.always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE, + }, + .num_consumer_supplies = ARRAY_SIZE(buck1_v2_consumers), + .consumer_supplies = buck1_v2_consumers +}; + +/*buck2_v2 VDDDR MobileDDR VCC*/ +static struct regulator_consumer_supply buck2_v2_consumers[] = { + { + .supply = "vccdr_v2", + } +}; + +static struct regulator_init_data rk2818_lp8725_buck2_v2_data = { + .constraints = { + .name = "VCCDR_V2", + .min_uV = 1800000, + .max_uV = 1800000, + .apply_uV = 1, + //.always_on = 1, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(buck2_v2_consumers), + .consumer_supplies = buck2_v2_consumers +}; + +struct lp8725_regulator_subdev rk2818_lp8725_regulator_subdev[] = { + { + .id=LP8725_LDO1, + .initdata=&rk2818_lp8725_ldo1_data, + }, + + { + .id=LP8725_LDO2, + .initdata=&rk2818_lp8725_ldo2_data, + }, + + { + .id=LP8725_LDO3, + .initdata=&rk2818_lp8725_ldo3_data, + }, + + { + .id=LP8725_LDO4, + .initdata=&rk2818_lp8725_ldo4_data, + }, + + { + .id=LP8725_LDO5, + .initdata=&rk2818_lp8725_ldo5_data, + }, + + { + .id=LP8725_LILO1, + .initdata=&rk2818_lp8725_lilo1_data, + }, + + { + .id=LP8725_LILO2, + .initdata=&rk2818_lp8725_lilo2_data, + }, + + { + .id=LP8725_DCDC1, + .initdata=&rk2818_lp8725_buck1_data, + }, + + { + .id=LP8725_DCDC2, + .initdata=&rk2818_lp8725_buck2_data, + }, + { + .id=LP8725_DCDC1_V2, + .initdata=&rk2818_lp8725_buck1_v2_data, + }, + + { + .id=LP8725_DCDC2_V2, + .initdata=&rk2818_lp8725_buck2_v2_data, + }, +}; + +struct lp8725_platform_data rk2818_lp8725_data={ + .num_regulators=LP8725_NUM_REGULATORS, + .regulators=rk2818_lp8725_regulator_subdev, +}; +#endif + +/***************************************************************************************** + * gsensor devices +*****************************************************************************************/ +#define GS_IRQ_PIN RK2818_PIN_PE3 + +struct rk2818_gs_platform_data rk2818_gs_platdata = { + .gsensor_irq_pin = GS_IRQ_PIN, + .swap_xy = 0, +}; + +/***************************************************************************************** + * wm8994 codec + * author: cjq@rock-chips.com + *****************************************************************************************/ +static struct wm8994_platform_data wm8994_data = { + .mic_input = 0, + .micBase_vcc = 0, + .bb_input = 0, + .bb_output = 0, + .frequence = 0, + .enable_pin = 0, + .headset_pin = 0, + .headset_call_vol = 0, + .speaker_call_vol = 0, + .earpiece_call_vol = 0, + .bt_call_vol = 0, +};// must initialize + +/***************************************************************************************** + * rtc + *****************************************************************************************/ +#define RTC_IRQ_PIN RK2818_PIN_PE2 + +static int rk2818_rtc_io_init(void) +{ + return 0; +} + +static int rk2818_rtc_io_deinit(void) +{ + return 0; +} + +static struct rk2818_rtc_platform_data rtc_data = { + .irq_type = GPIO_HIGH,//irq type + .io_init = rk2818_rtc_io_init, + .io_deinit = rk2818_rtc_io_deinit, +}; + +/***************************************************************************************** + * i2c devices + * author: kfx@rock-chips.com +*****************************************************************************************/ +static int rk2818_i2c0_io_init(void) +{ + rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, IOMUXA_I2C0); + return 0; +} + +static int rk2818_i2c1_io_init(void) +{ + rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, IOMUXA_I2C1); + return 0; +} + +struct rk2818_i2c_platform_data default_i2c0_data = { + .bus_num = 0, + .flags = 0, + .slave_addr = 0xff, + .scl_rate = 400*1000, + .mode = I2C_MODE_IRQ, //I2C_MODE_POLL + .io_init = rk2818_i2c0_io_init, +}; +struct rk2818_i2c_platform_data default_i2c1_data = { +#ifdef CONFIG_I2C0_RK2818 + .bus_num = 1, +#else + .bus_num = 0, +#endif + .flags = 0, + .slave_addr = 0xff, + .scl_rate = 400*1000, + .mode = I2C_MODE_POLL, //I2C_MODE_POLL + .io_init = rk2818_i2c1_io_init, +}; + +struct rk2818_i2c_spi_data default_i2c2_data = { + .bus_num = 2, + .flags = 0, + .slave_addr = 0xff, + .scl_rate = 400*1000, + +}; +struct rk2818_i2c_spi_data default_i2c3_data = { + + .bus_num = 3, + .flags = 0, + .slave_addr = 0xff, + .scl_rate = 400*1000, + +}; +static struct i2c_board_info __initdata board_i2c0_devices[] = { +#if defined (CONFIG_RK1000_CONTROL) + { + .type = "rk1000_control", + .addr = 0x40, + .flags = 0, + }, +#endif + +#if defined (CONFIG_RK1000_TVOUT) + { + .type = "rk1000_tvout", + .addr = 0x42, + .flags = 0, + }, +#endif +#if defined (CONFIG_SND_SOC_RK1000) + { + .type = "rk1000_i2c_codec", + .addr = 0x60, + .flags = 0, + }, +#endif +#if defined (CONFIG_SND_SOC_WM8988) + { + .type = "wm8988", + .addr = 0x1a, + .flags = 0, + } +#endif +#if defined (CONFIG_TOUCHSCREEN_IT7250) //add by robert for ctp_it7250 + { + .type = "Ctp_it7250", + .addr = 0x46, + .flags = 0, + .irq = RK2818_PIN_PE1, + }, +#endif //end add +}; +static struct i2c_board_info __initdata board_i2c1_devices[] = { +#if defined (CONFIG_RTC_HYM8563) + { + .type = "rtc_hym8563", + .addr = 0x51, + .flags = 0, + }, +#endif +#if defined (CONFIG_RTC_DRV_S35392A) + { + .type = "rtc-s35392a", + .addr = 0x30, + .flags = 0, + .irq = RTC_IRQ_PIN, + .platform_data = &rtc_data, + }, +#endif +#if defined (CONFIG_FM_QN8006) + { + .type = "fm_qn8006", + .addr = 0x2b, + .flags = 0, + }, +#endif +#if defined (CONFIG_GPIO_PCA9554) + { + .type = "extend_gpio_pca9554", + .addr = 0x3c, + .flags = 0, + .platform_data=&rk2818_pca9554_data.gpio_base, + }, +#endif +#if defined (CONFIG_RK2818_REGULATOR_LP8725) + { + .type = "lp8725", + .addr = 0x79, + .flags = 0, + .platform_data=&rk2818_lp8725_data, + }, +#endif +#if defined (CONFIG_GS_MMA7660) + { + .type = "gs_mma7660", + .addr = 0x4c, + .flags = 0, + .irq = GS_IRQ_PIN, + .platform_data = &rk2818_gs_platdata, + }, +#endif + +}; + +static struct i2c_board_info __initdata board_i2c2_devices[] = { + +}; + +static struct i2c_board_info __initdata board_i2c3_devices[] = { +#if defined (CONFIG_SND_SOC_WM8994) + { + .type = "wm8994", + .addr = 0x1a, + .flags = 0, + .platform_data = &wm8994_data, + }, +#endif +}; + +/* + * External power + */ + +static int power_supply_init(struct device *dev) +{ + return gpio_request(FPGA_PIO2_08, "AC charger detect"); +} + +static int rk2818_is_ac_online(void) +{ + return !gpio_get_value(FPGA_PIO2_08); +} + +static void power_supply_exit(struct device *dev) +{ + gpio_free(FPGA_PIO2_08); +} + +static char *rk2818_supplicant[] = { + "rk2818-battery" +}; + +static struct pda_power_pdata power_supply_info = { + .init = power_supply_init, + .is_ac_online = rk2818_is_ac_online, + .exit = power_supply_exit, + .supplied_to = rk2818_supplicant, + .num_supplicants = ARRAY_SIZE(rk2818_supplicant), +}; + +static struct resource power_supply_resources[] = { + [0] = { + .name = "ac", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | + IORESOURCE_IRQ_LOWEDGE, + }, + [1] = { + .name = "usb", + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | + IORESOURCE_IRQ_LOWEDGE, + }, +}; + +static struct platform_device power_supply = { + .name = "pda-power", + .id = -1, + .dev = { + .platform_data = &power_supply_info, + }, + .resource = power_supply_resources, + .num_resources = ARRAY_SIZE(power_supply_resources), +}; + +/* + * USB "Transceiver" + */ + +static struct resource gpio_vbus_resource = { + .flags = IORESOURCE_IRQ, + .start = IRQ_NR_OTG, + .end = IRQ_NR_OTG, +}; + +static struct gpio_vbus_mach_info gpio_vbus_info = { + .gpio_vbus = FPGA_PIO4_06, +}; + +static struct platform_device gpio_vbus = { + .name = "gpio-vbus", + .id = -1, + .num_resources = 1, + .resource = &gpio_vbus_resource, + .dev = { + .platform_data = &gpio_vbus_info, + }, +}; + +/* + * Battery charger + */ + +static struct regulator_consumer_supply rk2818_consumers[] = { + { + .dev=&rk2818_device_battery.dev, + .supply = "battery", + }, + { + .dev = &gpio_vbus.dev, + .supply = "vbus_draw", + }, + { + .dev = &power_supply.dev, + .supply = "ac_draw", + }, +}; + +static struct regulator_init_data charge_init_data = { + .constraints = { + .max_uA = 1200000, + .valid_ops_mask = REGULATOR_CHANGE_CURRENT, + }, + .num_consumer_supplies = ARRAY_SIZE(rk2818_consumers), + .consumer_supplies = rk2818_consumers, +}; + +static struct charge_platform_data charge_current_info = { + .gpio_charge = FPGA_PIO2_08, + .init_data = &charge_init_data, +}; + +static struct platform_device charge_current = { + .name = "charge-regulator", + .id = -1, + .dev = { + .platform_data = &charge_current_info, + }, +}; + +/***************************************************************************************** + * camera devices + * author: ddl@rock-chips.com + *****************************************************************************************/ +#ifdef CONFIG_VIDEO_RK2818 +/* Board-raho camera configuration */ +#define SENSOR_NAME_0 RK28_CAM_SENSOR_NAME_OV2655 +#define SENSOR_IIC_ADDR_0 0x60 +#define SENSOR_IIC_ADAPTER_ID_0 2 +#define SENSOR_POWER_PIN_0 FPGA_PIO1_05 +#define SENSOR_RESET_PIN_0 FPGA_PIO1_14 +#define SENSOR_POWERACTIVE_LEVEL_0 RK28_CAM_POWERACTIVE_L +#define SENSOR_RESETACTIVE_LEVEL_0 RK28_CAM_RESETACTIVE_L + + +#define SENSOR_NAME_1 NULL +#define SENSOR_IIC_ADDR_1 0x00 +#define SENSOR_IIC_ADAPTER_ID_1 0xff +#define SENSOR_POWER_PIN_1 INVALID_GPIO +#define SENSOR_RESET_PIN_1 INVALID_GPIO +#define SENSOR_POWERACTIVE_LEVEL_1 RK28_CAM_POWERACTIVE_L +#define SENSOR_RESETACTIVE_LEVEL_1 RK28_CAM_RESETACTIVE_L + +static int rk28_sensor_io_init(void); +static int rk28_sensor_io_deinit(void); + +struct rk28camera_platform_data rk28_camera_platform_data = { + .io_init = rk28_sensor_io_init, + .io_deinit = rk28_sensor_io_deinit, + .gpio_res = { + { + .gpio_reset = SENSOR_RESET_PIN_0, + .gpio_power = SENSOR_POWER_PIN_0, + .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0), + .dev_name = SENSOR_NAME_0, + }, { + .gpio_reset = SENSOR_RESET_PIN_1, + .gpio_power = SENSOR_POWER_PIN_1, + .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1), + .dev_name = SENSOR_NAME_1, + } + } +}; + +static int rk28_sensor_io_init(void) +{ + int ret = 0, i; + unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO; + unsigned int camera_ioflag; + //printk("\n%s....%d ******** ddl *********\n",__FUNCTION__,__LINE__); + + for (i=0; i<2; i++) { + camera_reset = rk28_camera_platform_data.gpio_res[i].gpio_reset; + camera_power = rk28_camera_platform_data.gpio_res[i].gpio_power; + camera_ioflag = rk28_camera_platform_data.gpio_res[i].gpio_flag; + + if (camera_power != INVALID_GPIO) { + ret = gpio_request(camera_power, "camera power"); + if (ret) + continue; + + gpio_set_value(camera_reset, (((~camera_ioflag)&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + gpio_direction_output(camera_power, (((~camera_ioflag)&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + + //printk("\n%s....%d %x ******** ddl *********\n",__FUNCTION__,__LINE__,(((~camera_ioflag)&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + + } + + if (camera_reset != INVALID_GPIO) { + ret = gpio_request(camera_reset, "camera reset"); + if (ret) { + if (camera_power != INVALID_GPIO) + gpio_free(camera_power); + + continue; + } + + gpio_set_value(camera_reset, ((camera_ioflag&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + gpio_direction_output(camera_reset, ((camera_ioflag&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + + //printk("\n%s....%d %x ******** ddl *********\n",__FUNCTION__,__LINE__,((camera_ioflag&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + + } + } + + return 0; +} + +static int rk28_sensor_io_deinit(void) +{ + unsigned int i; + unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO; + + //printk("\n%s....%d ******** ddl *********\n",__FUNCTION__,__LINE__); + + for (i=0; i<2; i++) { + camera_reset = rk28_camera_platform_data.gpio_res[i].gpio_reset; + camera_power = rk28_camera_platform_data.gpio_res[i].gpio_power; + + if (camera_power != INVALID_GPIO){ + gpio_direction_input(camera_power); + gpio_free(camera_power); + } + + if (camera_reset != INVALID_GPIO) { + gpio_direction_input(camera_reset); + gpio_free(camera_reset); + } + } + + return 0; +} + + +static int rk28_sensor_power(struct device *dev, int on) +{ + unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO; + unsigned int camera_ioflag; + + if(rk28_camera_platform_data.gpio_res[0].dev_name && (strcmp(rk28_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) { + camera_reset = rk28_camera_platform_data.gpio_res[0].gpio_reset; + camera_power = rk28_camera_platform_data.gpio_res[0].gpio_power; + camera_ioflag = rk28_camera_platform_data.gpio_res[0].gpio_flag; + } else if (rk28_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk28_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) { + camera_reset = rk28_camera_platform_data.gpio_res[1].gpio_reset; + camera_power = rk28_camera_platform_data.gpio_res[1].gpio_power; + camera_ioflag = rk28_camera_platform_data.gpio_res[1].gpio_flag; + } + + if (camera_reset != INVALID_GPIO) { + gpio_set_value(camera_reset, ((camera_ioflag&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + } + if (camera_power != INVALID_GPIO) { + if (on) { + gpio_set_value(camera_power, ((camera_ioflag&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + } else { + gpio_set_value(camera_power, (((~camera_ioflag)&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK28_CAM_POWERACTIVE_MASK)>>RK28_CAM_POWERACTIVE_BITPOS)); + } + } + if (camera_reset != INVALID_GPIO) { + msleep(3); /* delay 3 ms */ + gpio_set_value(camera_reset,(((~camera_ioflag)&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + //printk("\n%s..%s..ResetPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK28_CAM_RESETACTIVE_MASK)>>RK28_CAM_RESETACTIVE_BITPOS)); + } + return 0; +} + +static struct i2c_board_info rk2818_i2c_cam_info[] = { + { + I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1) + }, +}; + +struct soc_camera_link rk2818_iclink = { + .bus_id = RK28_CAM_PLATFORM_DEV_ID, + .power = rk28_sensor_power, + .board_info = &rk2818_i2c_cam_info[0], + .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0, + .module_name = SENSOR_NAME_0, +}; + +/*platform_device : soc-camera need */ +struct platform_device rk2818_soc_camera_pdrv = { + .name = "soc-camera-pdrv", + .id = -1, + .dev = { + .init_name = SENSOR_NAME_0, + .platform_data = &rk2818_iclink, + }, +}; +#endif +/***************************************************************************************** + * battery devices + * author: lw@rock-chips.com + *****************************************************************************************/ +#define CHARGEOK_PIN FPGA_PIO0_06 +struct rk2818_battery_platform_data rk2818_battery_platdata = { + .charge_ok_pin = CHARGEOK_PIN, + .charge_ok_level = 0, +}; + + +/***************************************************************************************** + * serial devices + * author: lhh@rock-chips.com + *****************************************************************************************/ +static int serial_io_init(void) +{ + int ret; +#if 1 + //cz@rock-chips.com + //20100808 + //UART0µÄËĸö¹Ü½ÅÏÈIOMUX³ÉGPIO + //È»ºó·Ö±ðÉèÖÃÊäÈëÊä³ö/À­¸ßÀ­µÍ´¦Àí + //×îºóÔÙIOMUX³ÉUART + //·ÀÖ¹Ö±½ÓIOMUX³ÉUARTºóËĸö¹Ü½ÅµÄ״̬²»¶Ôʱ + //²Ù×÷UARTµ¼ÖÂUART_USR_BUSYʼÖÕΪ1Ôì³ÉÈçÏÂËÀÑ­»· + //while(rk2818_uart_read(port,UART_USR)&UART_USR_BUSY) + //UARTËĸö¹Ü½ÅÔÚδ´«ÊäʱÕý³£×´Ì¬Ó¦¸ÃΪ£º + //RX/TX£ºHIGH + //CTS/RTS£ºLOW + //×¢Ò⣺CTS/RTSΪµÍÓÐЧ£¬Ó²¼þÉϲ»Ó¦¸ÃÇ¿ÐÐ×öÉÏÀ­ + rk2818_mux_api_set(GPIOG1_UART0_MMC1WPT_NAME, IOMUXA_GPIO1_C1 /*IOMUXA_UART0_SOUT*/); + rk2818_mux_api_set(GPIOG0_UART0_MMC1DET_NAME, IOMUXA_GPIO1_C0 /*IOMUXA_UART0_SIN*/); + + ret = gpio_request(RK2818_PIN_PG0, NULL); + if(ret != 0) + { + gpio_free(RK2818_PIN_PG0); + } + gpio_direction_output(RK2818_PIN_PG0,GPIO_HIGH); + + + ret = gpio_request(RK2818_PIN_PG1, NULL); + if(ret != 0) + { + gpio_free(RK2818_PIN_PG1); + } + gpio_direction_output(RK2818_PIN_PG1,GPIO_HIGH); + + gpio_pull_updown(RK2818_PIN_PG1,GPIOPullUp); + gpio_pull_updown(RK2818_PIN_PG0,GPIOPullUp); + + rk2818_mux_api_set(GPIOG1_UART0_MMC1WPT_NAME, IOMUXA_UART0_SOUT); + rk2818_mux_api_set(GPIOG0_UART0_MMC1DET_NAME, IOMUXA_UART0_SIN); + + rk2818_mux_api_set(GPIOB2_U0CTSN_SEL_NAME, IOMUXB_GPIO0_B2/*IOMUXB_UART0_CTS_N*/); + rk2818_mux_api_set(GPIOB3_U0RTSN_SEL_NAME, IOMUXB_GPIO0_B3/*IOMUXB_UART0_RTS_N*/); + + ret = gpio_request(RK2818_PIN_PB2, NULL); + if(ret != 0) + { + gpio_free(RK2818_PIN_PB2); + } + gpio_direction_input(RK2818_PIN_PB2); + // gpio_direction_output(RK2818_PIN_PB2,GPIO_LOW); + + ret = gpio_request(RK2818_PIN_PB3, NULL); + if(ret != 0) + { + gpio_free(RK2818_PIN_PB3); + } + gpio_direction_output(RK2818_PIN_PB3,GPIO_LOW); +#endif + + rk2818_mux_api_set(GPIOB2_U0CTSN_SEL_NAME, IOMUXB_UART0_CTS_N); + rk2818_mux_api_set(GPIOB3_U0RTSN_SEL_NAME, IOMUXB_UART0_RTS_N); + + return 0; +} + +struct rk2818_serial_platform_data rk2818_serial0_platdata = { + .io_init = serial_io_init, +}; + +/***************************************************************************************** + * i2s devices + * author: lhhrock-chips.com + *****************************************************************************************/ +static int i2s_io_init(void) +{ + /* Configure the I2S pins in correct mode */ + rk2818_mux_api_set(CXGPIO_I2S_SEL_NAME,IOMUXB_I2S_INTERFACE); + return 0; +} + +struct rk2818_i2s_platform_data rk2818_i2s_platdata = { + .io_init = i2s_io_init, +}; + + +/***************************************************************************************** + * spi devices + * author: lhhrock-chips.com + *****************************************************************************************/ +#define SPI_CHIPSELECT_NUM 3 +struct spi_cs_gpio rk2818_spi_cs_gpios[SPI_CHIPSELECT_NUM] = { + { + .name = "spi cs0", + .cs_gpio = RK2818_PIN_PB4, + .cs_iomux_name = GPIOB4_SPI0CS0_MMC0D4_NAME,//if no iomux,set it NULL + .cs_iomux_mode = IOMUXA_GPIO0_B4, + }, + { + .name = "spi cs1", + .cs_gpio = RK2818_PIN_PB0, + .cs_iomux_name = GPIOB0_SPI0CSN1_MMC1PCA_NAME, + .cs_iomux_mode = IOMUXA_GPIO0_B0, + }, + { + .name = "spi cs2", + .cs_gpio = RK2818_PIN_PF5, + .cs_iomux_name = GPIOF5_APWM3_DPWM3_NAME, + .cs_iomux_mode = IOMUXB_GPIO1_B5, + } +}; + +static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num) +{ + int i,j,ret; + //clk + rk2818_mux_api_set(GPIOB_SPI0_MMC0_NAME, IOMUXA_SPI0); + //cs + if (cs_gpios) { + for (i=0; i>>>>> lcd cs gpio_request err \n "); + } + } + + rk2818_mux_api_set(LCD_CLK_MUX_NAME, LCD_CLK_MUX_MODE); + if (LCD_CLK_PIN != INVALID_GPIO) { + ret = gpio_request(LCD_CLK_PIN, NULL); + if(ret != 0) + { + goto err2; + printk(">>>>>> lcd clk gpio_request err \n "); + } + } + + rk2818_mux_api_set(LCD_TXD_MUX_NAME, LCD_TXD_MUX_MODE); + if (LCD_TXD_PIN != INVALID_GPIO) { + ret = gpio_request(LCD_TXD_PIN, NULL); + if(ret != 0) + { + goto err3; + printk(">>>>>> lcd txd gpio_request err \n "); + } + } + + return 0; + +err3: + if (LCD_CLK_PIN != INVALID_GPIO) { + gpio_free(LCD_CLK_PIN); + } +err2: + if (LCD_CS_PIN != INVALID_GPIO) { + gpio_free(LCD_CS_PIN); + } +err1: + return ret; +} + +static int rk2818_lcd_io_deinit(void) +{ + int ret = 0; + gpio_free(LCD_CS_PIN); + rk2818_mux_api_mode_resume(LCD_CS_MUX_NAME); + gpio_free(LCD_CLK_PIN); + gpio_free(LCD_TXD_PIN); + rk2818_mux_api_mode_resume(LCD_TXD_MUX_NAME); + rk2818_mux_api_mode_resume(LCD_CLK_MUX_NAME); + + return ret; +} + +struct rk2818lcd_info rk2818_lcd_info = { + .txd_pin = LCD_TXD_PIN, + .clk_pin = LCD_CLK_PIN, + .cs_pin = LCD_CS_PIN, + .io_init = rk2818_lcd_io_init, + .io_deinit = rk2818_lcd_io_deinit, +}; + + +/***************************************************************************************** + * frame buffe devices + * author: zyw@rock-chips.com + *****************************************************************************************/ +#define FB_ID 0 +#define FB_DISPLAY_ON_PIN INVALID_GPIO +#define FB_LCD_STANDBY_PIN INVALID_GPIO +#define FB_MCU_FMK_PIN INVALID_GPIO + +#define FB_DISPLAY_ON_VALUE GPIO_LOW +#define FB_LCD_STANDBY_VALUE 0 + +#define FB_DISPLAY_ON_MUX_NAME NULL +#define FB_DISPLAY_ON_MUX_MODE 0 + +#define FB_LCD_STANDBY_MUX_NAME NULL +#define FB_LCD_STANDBY_MUX_MODE 1 + +#define FB_MCU_FMK_PIN_MUX_NAME NULL +#define FB_MCU_FMK_MUX_MODE 0 + +#define FB_DATA0_16_MUX_NAME GPIOC_LCDC16BIT_SEL_NAME +#define FB_DATA0_16_MUX_MODE 1 + +#define FB_DATA17_18_MUX_NAME GPIOC_LCDC18BIT_SEL_NAME +#define FB_DATA17_18_MUX_MODE 1 + +#define FB_DATA19_24_MUX_NAME GPIOC_LCDC24BIT_SEL_NAME +#define FB_DATA19_24_MUX_MODE 1 + +#define FB_DEN_MUX_NAME CXGPIO_LCDDEN_SEL_NAME +#define FB_DEN_MUX_MODE 1 + +#define FB_VSYNC_MUX_NAME CXGPIO_LCDVSYNC_SEL_NAME +#define FB_VSYNC_MUX_MODE 1 + +#define FB_MCU_FMK_MUX_NAME NULL +#define FB_MCU_FMK_MUX_MODE 0 + +static int rk2818_fb_io_init(struct rk2818_fb_setting_info *fb_setting) +{ + int ret = 0; + if(fb_setting->data_num <=16) + rk2818_mux_api_set(FB_DATA0_16_MUX_NAME, FB_DATA0_16_MUX_MODE); + if(fb_setting->data_num >16 && fb_setting->data_num<=18) + rk2818_mux_api_set(FB_DATA17_18_MUX_NAME, FB_DATA17_18_MUX_MODE); + if(fb_setting->data_num >18) + rk2818_mux_api_set(FB_DATA19_24_MUX_NAME, FB_DATA19_24_MUX_MODE); + + if(fb_setting->vsync_en) + rk2818_mux_api_set(FB_VSYNC_MUX_NAME, FB_VSYNC_MUX_MODE); + + if(fb_setting->den_en) + rk2818_mux_api_set(FB_DEN_MUX_NAME, FB_DEN_MUX_MODE); + + if(fb_setting->mcu_fmk_en && FB_MCU_FMK_MUX_NAME && (FB_MCU_FMK_PIN != INVALID_GPIO)) + { + rk2818_mux_api_set(FB_MCU_FMK_MUX_NAME, FB_MCU_FMK_MUX_MODE); + ret = gpio_request(FB_MCU_FMK_PIN, NULL); + if(ret != 0) + { + gpio_free(FB_MCU_FMK_PIN); + printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n "); + } + gpio_direction_input(FB_MCU_FMK_PIN); + } + + if(fb_setting->disp_on_en && FB_DISPLAY_ON_MUX_NAME && (FB_DISPLAY_ON_PIN != INVALID_GPIO)) + { + rk2818_mux_api_set(FB_DISPLAY_ON_MUX_NAME, FB_DISPLAY_ON_MUX_MODE); + ret = gpio_request(FB_DISPLAY_ON_PIN, NULL); + if(ret != 0) + { + gpio_free(FB_DISPLAY_ON_PIN); + printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n "); + } + } + + if(fb_setting->disp_on_en && FB_LCD_STANDBY_MUX_NAME && (FB_LCD_STANDBY_PIN != INVALID_GPIO)) + { + rk2818_mux_api_set(FB_LCD_STANDBY_MUX_NAME, FB_LCD_STANDBY_MUX_MODE); + ret = gpio_request(FB_LCD_STANDBY_PIN, NULL); + if(ret != 0) + { + gpio_free(FB_LCD_STANDBY_PIN); + printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n "); + } + } + + return ret; +} + +struct rk2818fb_info rk2818_fb_info = { + .fb_id = FB_ID, + .disp_on_pin = FB_DISPLAY_ON_PIN, + .disp_on_value = FB_DISPLAY_ON_VALUE, + .standby_pin = FB_LCD_STANDBY_PIN, + .standby_value = FB_LCD_STANDBY_VALUE, + .mcu_fmk_pin = FB_MCU_FMK_PIN, + .lcd_info = &rk2818_lcd_info, + .io_init = rk2818_fb_io_init, +}; + +/***************************************************************************************** + * backlight devices + * author: nzy@rock-chips.com + *****************************************************************************************/ + /* + GPIOF2_APWM0_SEL_NAME, IOMUXB_PWM0 + GPIOF3_APWM1_MMC0DETN_NAME, IOMUXA_PWM1 + GPIOF4_APWM2_MMC0WPT_NAME, IOMUXA_PWM2 + GPIOF5_APWM3_DPWM3_NAME, IOMUXB_PWM3 + */ + +#define PWM_ID 0 +#define PWM_MUX_NAME GPIOF2_APWM0_SEL_NAME +#define PWM_MUX_MODE IOMUXB_PWM0 +#define PWM_EFFECT_VALUE 0 + + +#define BL_EN_MUX_NAME GPIOF34_UART3_SEL_NAME +#define BL_EN_MUX_MODE IOMUXB_GPIO1_B34 + +#define BL_EN_PIN RK2818_PIN_PF3 +#define BL_EN_VALUE GPIO_HIGH + + + +static int rk2818_backlight_io_init(void) +{ + int ret = 0; + + rk2818_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE); + + rk2818_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE); + + ret = gpio_request(BL_EN_PIN, NULL); + if(ret != 0) + { + gpio_free(BL_EN_PIN); + printk(KERN_ERR ">>>>>> lcd_cs gpio_request err \n "); + } + + gpio_direction_output(BL_EN_PIN, 0); + gpio_set_value(BL_EN_PIN, BL_EN_VALUE); + + return ret; +} + +static int rk2818_backlight_io_deinit(void) +{ + int ret = 0; + + gpio_free(BL_EN_PIN); + + rk2818_mux_api_mode_resume(PWM_MUX_NAME); + + rk2818_mux_api_mode_resume(BL_EN_MUX_NAME); + + return ret; +} + +struct rk2818_bl_info rk2818_bl_info = { + .pwm_id = PWM_ID, + .bl_ref = PWM_EFFECT_VALUE, + .io_init = rk2818_backlight_io_init, + .io_deinit = rk2818_backlight_io_deinit, +}; + + +/***************************************************************************************** + * netcard devices + * author: lyx@rock-chips.com + *****************************************************************************************/ +#ifdef CONFIG_DM9000 +/* +GPIOA5_FLASHCS1_SEL_NAME IOMUXB_FLASH_CS1 +GPIOA6_FLASHCS2_SEL_NAME IOMUXB_FLASH_CS2 +GPIOA7_FLASHCS3_SEL_NAME IOMUXB_FLASH_CS3 +GPIOE_SPI1_FLASH_SEL1_NAME IOMUXA_FLASH_CS45 +GPIOE_SPI1_FLASH_SEL_NAME IOMUXA_FLASH_CS67 +*/ +#define DM9000_USE_NAND_CS 1 //cs can be 1,2,3,4,5,6 or 7 +#define DM9000_CS_IOMUX_NAME GPIOA5_FLASHCS1_SEL_NAME +#define DM9000_CS_IOMUX_MODE IOMUXB_FLASH_CS1 +#define DM9000_NET_INT_PIN RK2818_PIN_PA1 +#define DM9000_INT_IOMUX_NAME GPIOA1_HOSTDATA17_SEL_NAME +#define DM9000_INT_IOMUX_MODE IOMUXB_GPIO0_A1 +#define DM9000_INT_INIT_VALUE GPIOPullDown +#define DM9000_IRQ IRQF_TRIGGER_HIGH +#define DM9000_IO_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x8) +#define DM9000_DATA_ADDR (RK2818_NANDC_PHYS + 0x800 + DM9000_USE_NAND_CS*0x100 + 0x4) + +static int dm9k_gpio_set(void) +{ + //cs + rk2818_mux_api_set(DM9000_CS_IOMUX_NAME, DM9000_CS_IOMUX_MODE); + //int + rk2818_mux_api_set(DM9000_INT_IOMUX_NAME, DM9000_INT_IOMUX_MODE); + + return 0; +} +static int dm9k_gpio_free(void) +{ + rk2818_mux_api_mode_resume(DM9000_INT_IOMUX_NAME); + rk2818_mux_api_mode_resume(DM9000_CS_IOMUX_NAME); + return 0; +} + +static struct resource dm9k_resource[] = { + [0] = { + .start = DM9000_IO_ADDR, + .end = DM9000_IO_ADDR + 3, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = DM9000_DATA_ADDR, + .end = DM9000_DATA_ADDR + 3, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = DM9000_NET_INT_PIN, + .end = DM9000_NET_INT_PIN, + .flags = IORESOURCE_IRQ | DM9000_IRQ, + } + +}; + +/* for the moment we limit ourselves to 8bit IO until some + * better IO routines can be written and tested +*/ +struct dm9000_plat_data dm9k_platdata = { + .flags = DM9000_PLATF_8BITONLY, + .irq_pin = DM9000_NET_INT_PIN, + .irq_pin_value = DM9000_INT_INIT_VALUE, + .io_init = dm9k_gpio_set, + .io_deinit = dm9k_gpio_free, +}; + +struct platform_device rk2818_device_dm9k = { + .name = "dm9000", + .id = 0, + .num_resources = ARRAY_SIZE(dm9k_resource), + .resource = dm9k_resource, + .dev = { + .platform_data = &dm9k_platdata, + } +}; +#endif + +#ifdef CONFIG_HEADSET_DET +struct rk2818_headset_data rk2818_headset_info = { + .irq = FPGA_PIO0_00, + .irq_type = IRQF_TRIGGER_FALLING, + .headset_in_type= HEADSET_IN_HIGH, +}; + +struct platform_device rk28_device_headset = { + .name = "rk2818_headsetdet", + .id = 0, + .dev = { + .platform_data = &rk2818_headset_info, + } +}; +#endif + +#ifdef CONFIG_INPUT_LPSENSOR_CM3602 +static int capella_cm3602_power(int on); + +static struct capella_cm3602_platform_data capella_cm3602_pdata = { + .power = capella_cm3602_power, + .irq_pin = FPGA_PIO0_04, + .pwd_out_pin = FPGA_PIO4_07, + .ps_shutdown_pin = FPGA_PIO5_00, + //.p_out = MAHIMAHI_GPIO_PROXIMITY_INT_N + }; + +static int capella_cm3602_power(int on) +{ /* TODO eolsen Add Voltage reg control */ + if (on) { + printk("[%s]:on---\n",__FUNCTION__); + gpio_direction_output(capella_cm3602_pdata.pwd_out_pin, SPI_GPIO_LOW); + gpio_direction_output(capella_cm3602_pdata.ps_shutdown_pin, SPI_GPIO_LOW); + } + else { + printk("[%s]:off---\n",__FUNCTION__); + gpio_direction_output(capella_cm3602_pdata.pwd_out_pin, SPI_GPIO_HIGH); + gpio_direction_output(capella_cm3602_pdata.ps_shutdown_pin, SPI_GPIO_HIGH); + } + return 0; +} + +struct platform_device rk2818_device_cm3605 = { + .name = CAPELLA_CM3602, + .id = -1, + .dev = { + .platform_data = &capella_cm3602_pdata + } + }; +#endif + +/***************************************************************************************** + * nand flash devices + * author: hxy@rock-chips.com + *****************************************************************************************/ +/* +GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1 +GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2 +GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3 +GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45 +GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67 +*/ + +#define NAND_CS_MAX_NUM 1 /*form 0 to 8, it is 0 when no nand flash */ + +int rk2818_nand_io_init(void) +{ +#if (NAND_CS_MAX_NUM == 2) + rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1); +#elif (NAND_CS_MAX_NUM == 3) + rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1); + rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2); +#elif (NAND_CS_MAX_NUM == 4) + rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1); + rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2); + rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3); +#elif ((NAND_CS_MAX_NUM == 5) || (NAND_CS_MAX_NUM == 6)) + rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1); + rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2); + rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3); + rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45); +#elif ((NAND_CS_MAX_NUM == 7) || (NAND_CS_MAX_NUM == 8)) + rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1); + rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2); + rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, IOMUXB_FLASH_CS3); + rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, IOMUXA_FLASH_CS45); + rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, IOMUXA_FLASH_CS67); +#endif + return 0; +} + +struct rk2818_nand_platform_data rk2818_nand_data = { + .width = 1, /* data bus width in bytes */ + .hw_ecc = 1, /* hw ecc 0: soft ecc */ + .num_flash = 1, + .io_init = rk2818_nand_io_init, +}; + + +/********************usb*********************/ +struct usb_mass_storage_platform_data mass_storage_pdata = { + .nluns = 1, + .vendor = "RockChip", + .product = "rk2818 sdk", + .release = 0x0100, +}; + + +static struct platform_device *devices[] __initdata = { +#ifdef CONFIG_BT + &raho_rfkill, +#endif +#ifdef CONFIG_UART0_RK2818 + &rk2818_device_uart0, +#endif +#ifdef CONFIG_UART1_RK2818 + &rk2818_device_uart1, +#endif +#ifdef CONFIG_I2C0_RK2818 + &rk2818_device_i2c0, +#endif +#ifdef CONFIG_I2C1_RK2818 + &rk2818_device_i2c1, +#endif +#ifdef CONFIG_SDMMC0_RK2818 + &rk2818_device_sdmmc0, +#endif +#ifdef CONFIG_SDMMC1_RK2818 + &rk2818_device_sdmmc1, +#endif + &raho_wifi_device, + &rk2818_device_spim, + &rk2818_device_i2s, +#if defined(CONFIG_ANDROID_PMEM) + &rk2818_device_pmem, + &rk2818_device_pmem_dsp, +#endif + &rk2818_device_adc, + &rk2818_device_adckey, +#if defined(CONFIG_RK2818_REGULATOR_CHARGE) + &power_supply, + &charge_current, +#endif + &rk2818_device_battery, + &rk2818_device_fb, + &rk2818_device_backlight, + &rk2818_device_dsp, + +#ifdef CONFIG_VIDEO_RK2818 + &rk2818_device_camera, /* ddl@rock-chips.com : camera support */ + &rk2818_soc_camera_pdrv, + #endif + +#ifdef CONFIG_MTD_NAND_RK2818 + &rk2818_nand_device, +#endif +#ifdef CONFIG_DM9000 + &rk2818_device_dm9k, +#endif +#ifdef CONFIG_INPUT_LPSENSOR_CM3602 + &rk2818_device_cm3605, +#endif +#ifdef CONFIG_HEADSET_DET + &rk28_device_headset, +#endif +#ifdef CONFIG_DWC_OTG + &rk2818_device_dwc_otg, +#endif +#ifdef CONFIG_RK2818_HOST11 + &rk2818_device_host11, +#endif +#ifdef CONFIG_USB_ANDROID + &android_usb_device, + &usb_mass_storage_device, +#endif +#ifdef CONFIG_ANDROID_TIMED_GPIO + &rk28_device_vibrator, +#endif +}; + +extern struct sys_timer rk2818_timer; +#define POWER_PIN RK2818_PIN_PB1 +static void rk2818_power_on(void) +{ + int ret; + ret = gpio_request(POWER_PIN, NULL); + if (ret) { + printk("failed to request power_off gpio\n"); + goto err_free_gpio; + } + + gpio_pull_updown(POWER_PIN, GPIOPullUp); + ret = gpio_direction_output(POWER_PIN, GPIO_HIGH); + if (ret) { + printk("failed to set power_off gpio output\n"); + goto err_free_gpio; + } + + gpio_set_value(POWER_PIN, 1);/*power on*/ + +err_free_gpio: + gpio_free(POWER_PIN); +} + +static void rk2818_power_off(void) +{ + printk("shut down system now ...\n"); + gpio_set_value(POWER_PIN, 0);/*power down*/ +} + +// adc ---> key +#define PLAY_ON_PIN RK2818_PIN_PA3 +#define PLAY_ON_LEVEL 1 +static ADC_keyst gAdcValueTab[] = +{ + {0x65, AD2KEY1},///VOLUME_DOWN + {0xd3, AD2KEY2},///VOLUME_UP + {0x130, AD2KEY3},///MENU + {0x19d, AD2KEY4},///HOME + {0x202, AD2KEY5},///BACK + {0x2d0, AD2KEY6},///CALL + {0x267, AD2KEY7},///SEARCH + {0, 0}///table end +}; + +static unsigned char gInitKeyCode[] = +{ + AD2KEY1,AD2KEY2,AD2KEY3,AD2KEY4,AD2KEY5,AD2KEY6,AD2KEY7, + ENDCALL,KEYSTART,KEY_WAKEUP, +}; + +static struct adc_key_data rk2818_adc_key = { + .pin_playon = PLAY_ON_PIN, + .playon_level = PLAY_ON_LEVEL, + .adc_empty = 1000, + .adc_invalid = 20, + .adc_drift = 50, + .adc_chn = 1, + .adc_key_table = gAdcValueTab, + .initKeyCode = gInitKeyCode, + .adc_key_cnt = 10, +}; + +struct rk2818_adckey_platform_data rk2818_adckey_platdata = { + .adc_key = &rk2818_adc_key, + .name = "raho-keypad", +}; + +#if CONFIG_ANDROID_TIMED_GPIO +static struct timed_gpio timed_gpios[] = { + { + .name = "vibrator", + .gpio = SPI_GPIO_P1_12, + .max_timeout = 1000, + .active_low = 1, + }, +}; + +struct timed_gpio_platform_data rk28_vibrator_info = { + .num_gpios = 1, + .gpios = timed_gpios, +}; +#endif +#if defined (CONFIG_RK2818_SOC_PM) +void __tcmfunc rk2818_pm_scu_suspend(unsigned int *reg,int regoff) +{ + + switch(regoff) + { + case PM_SCU_CLKGATE0_CON: + { + } + + + } + +} + + + +void __tcmfunc rk2818_soc_general_reg_suspend(void) +{ + struct rk2818_pm_soc_st *general=rk2818_soc_pm.general; + + unsigned int *general_reg_addr=general->reg_base_addr; + #if 1 + general->reg_ctrbit|=(0x1<reg_ctrbit|=(0x1<reg_ctrbit|=(0x1<reg_ctrbit|=(0x1<reg_ctrbit|=(0x1<reg_ctrbit|=(0x1<> 18) & 0xfffc, + .boot_params = RK2818_SDRAM_PHYS + 0xf8000, + .map_io = machine_rk2818_mapio, + .init_irq = machine_rk2818_init_irq, + .init_machine = machine_rk2818_board_init, + .timer = &rk2818_timer, +MACHINE_END +