From: Duncan Sands <baldrick@free.fr>
Date: Sun, 10 Feb 2008 10:08:52 +0000 (+0000)
Subject: Add truncate and AssertZext result expansion.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=d885dbdf9eb7a51ebb9a15a85921f27d8219997c;p=oota-llvm.git

Add truncate and AssertZext result expansion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46926 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index 23d9bf125ec..b840db86cc7 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -209,6 +209,8 @@ private:
   void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi);
+  void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi);
+  void ExpandResult_TRUNCATE   (SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi);
   void ExpandResult_LOAD       (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi);
diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
index 9a0c37dd088..bb6a7f36a89 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
@@ -60,6 +60,8 @@ void DAGTypeLegalizer::ExpandResult(SDNode *N, unsigned ResNo) {
   case ISD::ANY_EXTEND:  ExpandResult_ANY_EXTEND(N, Lo, Hi); break;
   case ISD::ZERO_EXTEND: ExpandResult_ZERO_EXTEND(N, Lo, Hi); break;
   case ISD::SIGN_EXTEND: ExpandResult_SIGN_EXTEND(N, Lo, Hi); break;
+  case ISD::AssertZext:  ExpandResult_AssertZext(N, Lo, Hi); break;
+  case ISD::TRUNCATE:    ExpandResult_TRUNCATE(N, Lo, Hi); break;
   case ISD::BIT_CONVERT: ExpandResult_BIT_CONVERT(N, Lo, Hi); break;
   case ISD::SIGN_EXTEND_INREG: ExpandResult_SIGN_EXTEND_INREG(N, Lo, Hi); break;
   case ISD::LOAD:        ExpandResult_LOAD(cast<LoadSDNode>(N), Lo, Hi); break;
@@ -202,6 +204,34 @@ void DAGTypeLegalizer::ExpandResult_SIGN_EXTEND(SDNode *N,
   }
 }
 
+void DAGTypeLegalizer::ExpandResult_AssertZext(SDNode *N,
+                                               SDOperand &Lo, SDOperand &Hi) {
+  GetExpandedOp(N->getOperand(0), Lo, Hi);
+  MVT::ValueType NVT = Lo.getValueType();
+  MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
+  unsigned NVTBits = MVT::getSizeInBits(NVT);
+  unsigned EVTBits = MVT::getSizeInBits(EVT);
+
+  if (NVTBits < EVTBits) {
+    Hi = DAG.getNode(ISD::AssertZext, NVT, Hi,
+                     DAG.getValueType(MVT::getIntegerType(EVTBits - NVTBits)));
+  } else {
+    Lo = DAG.getNode(ISD::AssertZext, NVT, Lo, DAG.getValueType(EVT));
+    // The high part must be zero, make it explicit.
+    Hi = DAG.getConstant(0, NVT);
+  }
+}
+
+void DAGTypeLegalizer::ExpandResult_TRUNCATE(SDNode *N,
+                                             SDOperand &Lo, SDOperand &Hi) {
+  MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0));
+  Lo = DAG.getNode(ISD::TRUNCATE, NVT, N->getOperand(0));
+  Hi = DAG.getNode(ISD::SRL, N->getOperand(0).getValueType(), N->getOperand(0),
+                   DAG.getConstant(MVT::getSizeInBits(NVT),
+                                   TLI.getShiftAmountTy()));
+  Hi = DAG.getNode(ISD::TRUNCATE, NVT, Hi);
+}
+
 void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N,
                                                 SDOperand &Lo, SDOperand &Hi) {
   // Lower the bit-convert to a store/load from the stack, then expand the load.
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 6c357d2507b..bead077bf26 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2018,6 +2018,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
            "Cannot *_EXTEND_INREG FP types");
     assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) &&
            "Not extending!");
+    if (VT == EVT) return N1; // noop assertion.
     break;
   }
   case ISD::SIGN_EXTEND_INREG: {