From: Craig Topper <craig.topper@gmail.com>
Date: Tue, 5 Jan 2016 07:44:11 +0000 (+0000)
Subject: [X86] Add OpSize32 to OR32mrLocked instruction to match the normal OR32mr instruction.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=db43036e4d45da4a1a235d96eee7e779f7561db6;p=oota-llvm.git

[X86] Add OpSize32 to OR32mrLocked instruction to match the normal OR32mr instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256817 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index a585775f84e..ef3df0bb9a3 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -555,8 +555,8 @@ let usesCustomInserter = 1, Uses = [EFLAGS] in {
 // TODO: Get this to fold the constant into the instruction.
 let isCodeGenOnly = 1, Defs = [EFLAGS] in
 def OR32mrLocked  : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero),
-                      "or{l}\t{$zero, $dst|$dst, $zero}",
-                      [], IIC_ALU_MEM>, Requires<[Not64BitMode]>, LOCK,
+                      "or{l}\t{$zero, $dst|$dst, $zero}", [],
+                      IIC_ALU_MEM>, Requires<[Not64BitMode]>, OpSize32, LOCK,
                     Sched<[WriteALULd, WriteRMW]>;
 
 let hasSideEffects = 1 in