From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Tue, 29 Jul 2014 18:51:54 +0000 (+0000)
Subject: R600/SI: Set bits on SMRD instructions
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=dbd003e5821f0251919daecccb5c2851f34975bb;p=oota-llvm.git

R600/SI: Set bits on SMRD instructions

Set mayStore = 0 and enable named operand table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214194 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIInstrFormats.td b/lib/Target/R600/SIInstrFormats.td
index 00e69ddbeea..d7b593d4a60 100644
--- a/lib/Target/R600/SIInstrFormats.td
+++ b/lib/Target/R600/SIInstrFormats.td
@@ -185,6 +185,9 @@ class SMRD <bits<5> op, bits<1> imm, dag outs, dag ins, string asm,
 
   let LGKM_CNT = 1;
   let SMRD = 1;
+  let mayStore = 0;
+  let mayLoad = 1;
+  let UseNamedOperandTable = 1;
 }
 
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