From: Joel Jones Date: Mon, 4 Jun 2012 23:38:57 +0000 (+0000) Subject: This change handles a another case for generating the bic instruction X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=dd52bf2ed806229732115400b2a060204f24dea3;p=oota-llvm.git This change handles a another case for generating the bic instruction when a compile time constant is known. This occurs when implicitly zero extending function arguments from 16 bits to 32 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157966 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index c309f84b58b..f7b8a835f79 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -62,6 +62,14 @@ def t2_so_imm_neg_XFORM : SDNodeXFormgetTargetConstant(-((int)N->getZExtValue()), MVT::i32); }]>; +// so_imm_not_sext_XFORM - Return a so_imm value packed into the format +// described for so_imm_not_sext def below. +def t2_so_imm_not_sext_XFORM : SDNodeXFormgetAPIntValue(); + unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue(); + return CurDAG->getTargetConstant(~N16bitSignExt, MVT::i32); +}]>; + // t2_so_imm - Match a 32-bit immediate operand, which is an // 8-bit immediate rotated by an arbitrary number of bits, or an 8-bit // immediate splatted into multiple bytes of the word. @@ -86,6 +94,17 @@ def t2_so_imm_not : Operand, PatLeaf<(imm), [{ let ParserMatchClass = t2_so_imm_not_asmoperand; } +// t2_so_imm_not_sext - Match an immediate that when zero-extended +// from 16-bits to 32-bits is a complement of a t2_so_imm. +def t2_so_imm_not_sext : Operand, PatLeaf<(imm), [{ + APInt apIntN = N->getAPIntValue(); + if (!apIntN.isIntN(16)) return false; + unsigned N16bitSignExt = apIntN.trunc(16).sext(32).getZExtValue(); + return ARM_AM::getT2SOImmVal(~N16bitSignExt) != -1; + }], t2_so_imm_not_sext_XFORM> { + let ParserMatchClass = t2_so_imm_not_asmoperand; +} + // t2_so_imm_neg - Match an immediate that is a negation of a t2_so_imm. def t2_so_imm_neg_asmoperand : AsmOperandClass { let Name = "T2SOImmNeg"; } def t2_so_imm_neg : Operand, PatLeaf<(imm), [{ @@ -2332,6 +2351,11 @@ let AddedComplexity = 1 in def : T2Pat<(and rGPR:$src, t2_so_imm_not:$imm), (t2BICri rGPR:$src, t2_so_imm_not:$imm)>; +// so_imm_not_sext is needed instead of so_imm_not, as the value of imm +// will match the original bitWidth for $src. +def : T2Pat<(and rGPR:$src, t2_so_imm_not_sext:$imm), + (t2BICri rGPR:$src, t2_so_imm_not_sext:$imm)>; + // FIXME: Disable this pattern on Darwin to workaround an assembler bug. def : T2Pat<(or rGPR:$src, t2_so_imm_not:$imm), (t2ORNri rGPR:$src, t2_so_imm_not:$imm)>, diff --git a/test/CodeGen/ARM/bicNoZext.ll b/test/CodeGen/ARM/bicNoZext.ll new file mode 100644 index 00000000000..cf4b7ba0e04 --- /dev/null +++ b/test/CodeGen/ARM/bicNoZext.ll @@ -0,0 +1,19 @@ +; RUN: llc %s -o - | FileCheck %s +; ModuleID = 'bic.c' +target triple = "thumbv7-apple-ios3.0.0" + +define zeroext i16 @foo16(i16 zeroext %f) nounwind readnone optsize ssp { +entry: + ; CHECK: .thumb_func _foo16 + ; CHECK: {{bic[^#]*#3}} + %and = and i16 %f, -4 + ret i16 %and +} + +define i32 @foo32(i32 %f) nounwind readnone optsize ssp { +entry: + ; CHECK: .thumb_func _foo32 + ; CHECK: {{bic[^#]*#3}} + %and = and i32 %f, -4 + ret i32 %and +}