From: dalong.zhang <dalon.zhang@rock-chips.com>
Date: Sun, 9 Oct 2016 09:00:01 +0000 (+0800)
Subject: ARM64: dts: rk3399-android: add isp0 node for isp10
X-Git-Tag: firefly_0821_release~1203
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=dedd9545a15885bd524eab0273c28cd1043a0a19;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399-android: add isp0 node for isp10

Change-Id: I1324bd021ec87f10ad4b5fd200bdf83efd1dab66
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
index 260427d127c0..a00953700c8a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-android.dtsi
@@ -348,6 +348,29 @@
 		interrupt-names = "vopl_mmu";
 	};
 
+	cif_isp0: cif_isp@ff910000 {
+		compatible = "rockchip,rk3399-cif-isp";
+		rockchip,grf = <&grf>;
+		reg = <0x0 0xff910000 0x0 0x10000>, <0x0 0xff968000 0x0 0x8000>;
+		reg-names = "register", "dsihost-register";
+		clocks =
+			<&cru SCLK_CIF_OUT>, <&cru SCLK_CIF_OUT>,
+			<&cru SCLK_DPHY_TX1RX1_CFG>, <&cru SCLK_MIPIDPHY_REF>,
+			<&cru ACLK_ISP0_NOC>, <&cru ACLK_ISP0_WRAPPER>,
+			<&cru HCLK_ISP0_NOC>, <&cru HCLK_ISP0_WRAPPER>,
+			<&cru SCLK_ISP0>, <&cru SCLK_DPHY_RX0_CFG>;
+		clock-names =
+			"clk_cif_out", "clk_cif_pll",
+			"pclk_dphytxrx", "pclk_dphy_ref",
+			"aclk_isp0_noc", "aclk_isp0_wrapper",
+			"hclk_isp0_noc", "hclk_isp0_wrapper",
+			"clk_isp0", "pclk_dphyrx";
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "cif_isp10_irq";
+		power-domains = <&power RK3399_PD_ISP0>;
+		status = "disabled";
+	};
+
 	isp0: isp@ff910000 {
 		compatible = "rockchip,rk3399-isp", "rockchip,isp";
 		reg = <0x0 0xff910000 0x0 0x10000>;
@@ -564,4 +587,15 @@
 			rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	cam_pins {
+		cam0_default_pins: cam0-default-pins {
+			rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>,
+					<2 11 RK_FUNC_3 &pcfg_pull_none>;
+		};
+		cam0_sleep_pins: cam0-sleep-pins {
+			rockchip,pins = <4 27 RK_FUNC_3 &pcfg_pull_none>,
+					<2 11 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
 };