From: Keerthy Date: Thu, 18 Jun 2015 08:01:13 +0000 (+0530) Subject: ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock X-Git-Tag: firefly_0821_release~176^2~1183^2~4^2~2^2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=dff8a207815a605872dfc5bffc1bae1cad29d87c;p=firefly-linux-kernel-4.4.55.git ARM: dts: am4372: Set the default clock rate for dpll_clksel_mac_clk clock cpsw needs the clock to be running at 50MHz in kernel. Hence setting the default rate. Signed-off-by: Keerthy Signed-off-by: Tero Kristo --- diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index ade28c790f4b..8091af6a99c3 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -527,8 +527,11 @@ #address-cells = <1>; #size-cells = <1>; ti,hwmods = "cpgmac0"; - clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; - clock-names = "fck", "cpts"; + clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>, + <&dpll_clksel_mac_clk>; + clock-names = "fck", "cpts", "50mclk"; + assigned-clocks = <&dpll_clksel_mac_clk>; + assigned-clock-rates = <50000000>; status = "disabled"; cpdma_channels = <8>; ale_entries = <1024>;