From: Evan Cheng Date: Fri, 23 Mar 2007 22:13:36 +0000 (+0000) Subject: Make sure SEXTLOAD of the specific type is supported on the target. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e177e307fce9cf543b8f0b7a7963cc0328c5f362;p=oota-llvm.git Make sure SEXTLOAD of the specific type is supported on the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35289 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index df951a51bb2..569b1a91d71 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -2272,9 +2272,13 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) { MVT::ValueType VT = N->getValueType(0); MVT::ValueType EVT = N->getValueType(0); + // Special case: SIGN_EXTEND_INREG is basically truncating to EVT then + // extended to VT. if (Opc == ISD::SIGN_EXTEND_INREG) { ExtType = ISD::SEXTLOAD; EVT = cast(N->getOperand(1))->getVT(); + if (AfterLegalize && !TLI.isLoadXLegal(ISD::SEXTLOAD, EVT)) + return SDOperand(); } unsigned EVTBits = MVT::getSizeInBits(EVT);